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Fix state managment bugs

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This commit is contained in:
Keith Whitwell 2000-02-14 19:56:10 +00:00
parent 80e9874631
commit 99f656d561
9 changed files with 59 additions and 39 deletions
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8
linux-core/i810_dma.c
View file

@ -429,10 +429,10 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
int length = buf->used;
int i = 0;
RING_LOCALS;
if (I810_VERBOSE)
DRM_DEBUG("dispatch vertex addr 0x%lx, length 0x%x nbox %d\n",
address, length, buf_priv->nbox);
if (0)
printk("dispatch vertex %d addr 0x%lx, length 0x%x nbox %d\n",
buf->idx, address, length, buf_priv->nbox);
sarea_priv->last_dispatch = buf_priv->age;
dev_priv->counter++;

4
linux-core/mga_drv.c
View file

@ -482,7 +482,7 @@ int mga_init(void)
}
#ifdef CONFIG_MTRR
dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
dev->agp->agp_info.aper_size,
dev->agp->agp_info.aper_size * 1024 * 1024,
MTRR_TYPE_WRCOMB,
1);
#endif
@ -527,7 +527,7 @@ void mga_cleanup(void)
int retval;
retval = mtrr_del(dev->agp->agp_mtrr,
dev->agp->agp_info.aper_base,
dev->agp->agp_info.aper_size);
dev->agp->agp_info.aper_size * 1024*1024);
DRM_DEBUG("mtrr_del = %d\n", retval);
}
#endif

8
linux/i810_dma.c
View file

@ -429,10 +429,10 @@ static void i810_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
int length = buf->used;
int i = 0;
RING_LOCALS;
if (I810_VERBOSE)
DRM_DEBUG("dispatch vertex addr 0x%lx, length 0x%x nbox %d\n",
address, length, buf_priv->nbox);
if (0)
printk("dispatch vertex %d addr 0x%lx, length 0x%x nbox %d\n",
buf->idx, address, length, buf_priv->nbox);
sarea_priv->last_dispatch = buf_priv->age;
dev_priv->counter++;

12
linux/mga_bufs.c
View file

@ -76,7 +76,7 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
DRM_DEBUG("count: %d\n", count);
DRM_DEBUG("order: %d\n", order);
DRM_DEBUG("size: %d\n", size);
DRM_DEBUG("agp_offset: %d\n", agp_offset);
DRM_DEBUG("agp_offset: %ld\n", agp_offset);
DRM_DEBUG("alignment: %d\n", alignment);
DRM_DEBUG("page_order: %d\n", page_order);
DRM_DEBUG("total: %d\n", total);
@ -121,7 +121,7 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
buf->order = order;
buf->used = 0;
DRM_DEBUG("offset : %d\n", offset);
DRM_DEBUG("offset : %ld\n", offset);
buf->offset = offset; /* Hrm */
buf->bus_address = dev->agp->base + agp_offset + offset;
@ -185,7 +185,7 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
DRM_DEBUG("count: %d\n", count);
DRM_DEBUG("order: %d\n", order);
DRM_DEBUG("size: %d\n", size);
DRM_DEBUG("agp_offset: %d\n", agp_offset);
DRM_DEBUG("agp_offset: %ld\n", agp_offset);
DRM_DEBUG("alignment: %d\n", alignment);
DRM_DEBUG("page_order: %d\n", page_order);
DRM_DEBUG("total: %d\n", total);
@ -193,7 +193,7 @@ int mga_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd,
dma->flags = _DRM_DMA_USE_AGP;
DRM_DEBUG("dma->flags : %lx\n", dma->flags);
DRM_DEBUG("dma->flags : %x\n", dma->flags);
return 0;
}
@ -558,7 +558,7 @@ int mga_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
-EFAULT);
DRM_DEBUG("mga_mapbufs\n");
DRM_DEBUG("dma->flags : %lx\n", dma->flags);
DRM_DEBUG("dma->flags : %x\n", dma->flags);
if (request.count >= dma->buf_count) {
if(dma->flags & _DRM_DMA_USE_AGP) {
@ -576,7 +576,7 @@ int mga_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd,
DRM_DEBUG("map->size : %lx\n", map->size);
DRM_DEBUG("map->type : %d\n", map->type);
DRM_DEBUG("map->flags : %x\n", map->flags);
DRM_DEBUG("map->handle : %lx\n", map->handle);
DRM_DEBUG("map->handle : %p\n", map->handle);
DRM_DEBUG("map->mtrr : %d\n", map->mtrr);
virtual = do_mmap(filp, 0, map->size, PROT_READ|PROT_WRITE,

33
linux/mga_dma.c
View file

@ -253,6 +253,8 @@ static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) {
dev_priv->mAccess = init->mAccess;
dev_priv->WarpPipe = -1;
if (MGA_VERBOSE) {
DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n",
dev_priv->chipset, dev_priv->warp_ucode_size,
@ -628,6 +630,7 @@ static void mga_dma_dispatch_tex_blit(drm_device_t *dev, drm_buf_t *buf )
sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
}
mga_flush_write_combine();
MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL);
MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp);
@ -643,27 +646,36 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
drm_buf_t *real_buf = dev->dma->buflist[ buf_priv->vertex_real_idx ];
unsigned long address = (unsigned long)real_buf->bus_address;
int length = buf->used; /* this is correct */
int length = buf->used;
int use_agp = PDEA_pagpxfer_enable;
int i = 0;
PRIMLOCALS;
PRIMRESET(dev_priv);
if (MGA_VERBOSE)
DRM_DEBUG("dispatch vertex addr 0x%lx, length 0x%x nbox %d\n",
address, length, buf_priv->nbox);
DRM_DEBUG("dispatch vertex %d addr 0x%lx, length 0x%x nbox %d\n",
buf->idx, address, length, buf_priv->nbox);
if (!buf_priv->vertex_discard) {
mgaEmitState( dev_priv, buf_priv );
do {
if (i < buf_priv->nbox)
if (i < buf_priv->nbox) {
if (0)
DRM_DEBUG("idx %d Emit box %d/%d:"
"%d,%d - %d,%d\n",
buf->idx,
i, buf_priv->nbox,
buf_priv->boxes[i].x1,
buf_priv->boxes[i].y1,
buf_priv->boxes[i].x2,
buf_priv->boxes[i].y2);
mgaEmitClipRect( dev_priv,
&buf_priv->boxes[i] );
}
PRIMGETPTR(dev_priv);
PRIMOUTREG( MGAREG_DMAPAD, 0);
@ -676,7 +688,6 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
PRIMADVANCE( dev_priv );
} while (++i < buf_priv->nbox);
}
else DRM_DEBUG("discard\n");
dev_priv->last_sync_tag = mga_create_sync_tag(dev_priv);
@ -688,9 +699,9 @@ static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf)
PRIMOUTREG(MGAREG_SOFTRAP, 0);
if(sarea_priv->dirty & MGA_DMA_FLUSH) {
DRM_DEBUG("Dma top flush\n");
while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) ;
sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
DRM_DEBUG("Dma top flush\n");
while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) ;
sarea_priv->dirty &= ~(MGA_DMA_FLUSH);
}
PRIMADVANCE( dev_priv );

8
linux/mga_drm_public.h
View file

@ -154,12 +154,15 @@ typedef struct _xf86drmClipRectRec {
#define MGA_UPLOAD_TEX0IMAGE 0x10
#define MGA_UPLOAD_TEX1IMAGE 0x20
#define MGA_UPLOAD_2D 0x40
#define MGA_REQUIRE_QUIESCENT 0x80 /* handled client-side */
#define MGA_WAIT_AGE 0x80 /* handled client-side */
#define MGA_UPLOAD_CLIPRECTS 0x100
#define MGA_DMA_FLUSH 0x200
/* dirty flag when someone gets the lock quiescent */
#define MGA_DMA_BUF_ORDER 16
/* 64 buffers of 16k each, total 1 meg.
*/
#define MGA_DMA_BUF_ORDER 14
#define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER)
#define MGA_DMA_BUF_NR 63
@ -184,6 +187,7 @@ typedef struct
unsigned int ContextState[MGA_CTX_SETUP_SIZE];
unsigned int ServerState[MGA_2D_SETUP_SIZE];
unsigned int TexState[2][MGA_TEX_SETUP_SIZE];
unsigned int WarpPipe;
unsigned int dirty;

4
linux/mga_drv.c
View file

@ -482,7 +482,7 @@ int mga_init(void)
}
#ifdef CONFIG_MTRR
dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base,
dev->agp->agp_info.aper_size,
dev->agp->agp_info.aper_size * 1024 * 1024,
MTRR_TYPE_WRCOMB,
1);
#endif
@ -527,7 +527,7 @@ void mga_cleanup(void)
int retval;
retval = mtrr_del(dev->agp->agp_mtrr,
dev->agp->agp_info.aper_base,
dev->agp->agp_info.aper_size);
dev->agp->agp_info.aper_size * 1024*1024);
DRM_DEBUG("mtrr_del = %d\n", retval);
}
#endif

1
linux/mga_drv.h
View file

@ -50,6 +50,7 @@ typedef struct _drm_mga_private {
int sgram;
int use_agp;
mgaWarpIndex WarpIndex[MGA_MAX_G400_PIPES];
unsigned int WarpPipe;
__volatile__ unsigned long softrap_age;
atomic_t dispatch_lock;
atomic_t pending_bufs;

20
linux/mga_state.c
View file

@ -177,8 +177,7 @@ static void mgaG400EmitTex0( drm_mga_private_t *dev_priv,
static void mgaG400EmitTex1( drm_mga_private_t *dev_priv,
drm_mga_buf_priv_t *buf_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int *regs = sarea_priv->TexState[1];
unsigned int *regs = buf_priv->TexState[1];
PRIMLOCALS;
PRIMGETPTR(dev_priv);
@ -215,8 +214,7 @@ static void mgaG400EmitTex1( drm_mga_private_t *dev_priv,
static void mgaG400EmitPipe(drm_mga_private_t *dev_priv,
drm_mga_buf_priv_t *buf_priv)
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int pipe = sarea_priv->WarpPipe;
unsigned int pipe = buf_priv->WarpPipe;
float fParam = 12800.0f;
PRIMLOCALS;
@ -264,8 +262,7 @@ static void mgaG400EmitPipe(drm_mga_private_t *dev_priv,
static void mgaG200EmitPipe( drm_mga_private_t *dev_priv,
drm_mga_buf_priv_t *buf_priv )
{
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int pipe = sarea_priv->WarpPipe;
unsigned int pipe = buf_priv->WarpPipe;
PRIMLOCALS;
PRIMGETPTR(dev_priv);
@ -297,8 +294,13 @@ void mgaEmitState( drm_mga_private_t *dev_priv, drm_mga_buf_priv_t *buf_priv )
if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
int multitex = buf_priv->WarpPipe & MGA_T2;
if (dirty & MGA_UPLOAD_PIPE)
/* printk("BUF PIPE: %x LOADED PIPE: %x\n", */
/* buf_priv->WarpPipe, dev_priv->WarpPipe); */
if (buf_priv->WarpPipe != dev_priv->WarpPipe) {
mgaG400EmitPipe( dev_priv, buf_priv );
dev_priv->WarpPipe = buf_priv->WarpPipe;
}
if (dirty & MGA_UPLOAD_CTX)
mgaEmitContext( dev_priv, buf_priv );
@ -309,8 +311,10 @@ void mgaEmitState( drm_mga_private_t *dev_priv, drm_mga_buf_priv_t *buf_priv )
if ((dirty & MGA_UPLOAD_TEX1) && multitex)
mgaG400EmitTex1( dev_priv, buf_priv );
} else {
if (dirty & MGA_UPLOAD_PIPE)
if (buf_priv->WarpPipe != dev_priv->WarpPipe) {
mgaG200EmitPipe( dev_priv, buf_priv );
dev_priv->WarpPipe = buf_priv->WarpPipe;
}
if (dirty & MGA_UPLOAD_CTX)
mgaEmitContext( dev_priv, buf_priv );