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- EXT_texture_lod_bias fixes.

Browse source 
- Polygon stipple fixes.
This commit is contained in:
Gareth Hughes 2001-01-03 11:43:14 +00:00
parent 0d221f420e
commit 9649e63ba2
6 changed files with 50 additions and 15 deletions
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2
linux-core/radeon_drv.c
View file

@ -34,7 +34,7 @@
#define RADEON_NAME "radeon"
#define RADEON_DESC "ATI Radeon"
#define RADEON_DATE "20010102"
#define RADEON_DATE "20010103"
#define RADEON_MAJOR 1
#define RADEON_MINOR 0
#define RADEON_PATCHLEVEL 0

2
linux/r128_state.c
View file

@ -1357,7 +1357,7 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
BEGIN_RING( 33 );
OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) );
OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) );
for ( i = 0 ; i < 32 ; i++ ) {
OUT_RING( stipple[i] );
}

7
linux/radeon_cp.c
View file

@ -736,10 +736,9 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev_priv->ring.tail_mask =
(dev_priv->ring.size / sizeof(u32)) - 1;
/* Initialize the scratch register pointer.
* GH: We really want to do this, but it seems to be causing
* some instability. I'll look into this later on...
* GH: I'll remove the magic numbers when it works.
/* Initialize the scratch register pointer. This will cause
* the scratch register values to be written out to memory
* whenever they are updated.
*/
RADEON_WRITE( RADEON_SCRATCH_ADDR, (dev_priv->ring_rptr->offset +
RADEON_SCRATCH_REG_OFFSET) );

2
linux/radeon_drv.c
View file

@ -34,7 +34,7 @@
#define RADEON_NAME "radeon"
#define RADEON_DESC "ATI Radeon"
#define RADEON_DATE "20010102"
#define RADEON_DATE "20010103"
#define RADEON_MAJOR 1
#define RADEON_MINOR 0
#define RADEON_PATCHLEVEL 0

7
linux/radeon_drv.h
View file

@ -335,9 +335,11 @@ extern int radeon_context_switch_complete(drm_device_t *dev, int new);
# define RADEON_RBBM_FIFOCNT_MASK 0x007f
# define RADEON_RBBM_ACTIVE (1 << 31)
#define RADEON_RE_LINE_PATTERN 0x1cd0
#define RADEON_RE_TOP_LEFT 0x26c0
#define RADEON_RE_MISC 0x26c4
#define RADEON_RE_TOP_LEFT 0x26c0
#define RADEON_RE_WIDTH_HEIGHT 0x1c44
#define RADEON_RE_STIPPLE_ADDR 0x1cc8
#define RADEON_RE_STIPPLE_DATA 0x1ccc
#define RADEON_SCISSOR_TL_0 0x1cd8
#define RADEON_SCISSOR_BR_0 0x1cdc
@ -451,6 +453,7 @@ extern int radeon_context_switch_complete(drm_device_t *dev, int new);
/* CP command packets */
#define RADEON_CP_PACKET0 0x00000000
# define RADEON_ONE_REG_WR (1 << 15)
#define RADEON_CP_PACKET1 0x40000000
#define RADEON_CP_PACKET2 0x80000000
#define RADEON_CP_PACKET3 0xC0000000
@ -544,6 +547,8 @@ extern int RADEON_READ_PLL(drm_device_t *dev, int addr);
#define CP_PACKET0( reg, n ) \
(RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
#define CP_PACKET0_TABLE( reg, n ) \
(RADEON_CP_PACKET0 | RADEON_ONE_REG_WR | ((n) << 16) | ((reg) >> 2))
#define CP_PACKET1( reg0, reg1 ) \
(RADEON_CP_PACKET1 | (((reg1) >> 2) << 15) | ((reg0) >> 2))
#define CP_PACKET2() \

45
linux/radeon_state.c
View file

@ -630,11 +630,9 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
/* FIXME: Render a rectangle to clear the depth
* buffer. So much for those "fast Z clears"...
*/
BEGIN_RING( 27 );
BEGIN_RING( 22 );
RADEON_PURGE_CACHE();
RADEON_PURGE_ZCACHE();
RADEON_WAIT_UNTIL_IDLE();
RADEON_WAIT_UNTIL_2D_IDLE();
OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) );
OUT_RING( pp_cntl );
@ -1139,9 +1137,31 @@ static int radeon_cp_dispatch_blit( drm_device_t *dev,
return 0;
}
static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple )
{
drm_radeon_private_t *dev_priv = dev->dev_private;
int i;
RING_LOCALS;
DRM_INFO( "%s\n", __FUNCTION__ );
radeon_update_ring_snapshot( dev_priv );
BEGIN_RING( 35 );
OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) );
OUT_RING( 0x00000000 );
OUT_RING( CP_PACKET0_TABLE( RADEON_RE_STIPPLE_DATA, 31 ) );
for ( i = 0 ; i < 32 ; i++ ) {
OUT_RING( stipple[i] );
}
ADVANCE_RING();
}
/* ================================================================
*
* IOCTL functions
*/
int radeon_cp_clear( struct inode *inode, struct file *filp,
@ -1380,7 +1400,8 @@ int radeon_cp_stipple( struct inode *inode, struct file *filp,
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_DEBUG( "%s\n", __FUNCTION__ );
drm_radeon_stipple_t stipple;
u32 mask[32];
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
dev->lock.pid != current->pid ) {
@ -1388,7 +1409,17 @@ int radeon_cp_stipple( struct inode *inode, struct file *filp,
return -EINVAL;
}
return -EINVAL;
if ( copy_from_user( &stipple, (drm_radeon_stipple_t *)arg,
sizeof(stipple) ) )
return -EFAULT;
if ( copy_from_user( &mask, stipple.mask,
32 * sizeof(u32) ) )
return -EFAULT;
radeon_cp_dispatch_stipple( dev, mask );
return 0;
}
int radeon_cp_indirect( struct inode *inode, struct file *filp,