mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 07:00:11 +01:00
Remove the untested, unused gamma driver.
This commit is contained in:
Eric Anholt
parent
6e37c20647
commit
939c60b80a
9 changed files with 3 additions and 987 deletions
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@ -1,6 +1,6 @@
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# $FreeBSD$
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# $FreeBSD$
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# i810, i830 & sis are not complete
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# i810, i830 & sis are not complete
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SUBDIR = gamma mga r128 radeon tdfx # i810 i830 sis
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SUBDIR = mga r128 radeon tdfx # gamma i810 i830 sis
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.include <bsd.subdir.mk>
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.include <bsd.subdir.mk>
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@ -1,6 +1,6 @@
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# $FreeBSD$
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# $FreeBSD$
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# i810, i830 & sis are not complete
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# i810, i830 & sis are not complete
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SUBDIR = gamma mga r128 radeon tdfx # i810 i830 sis
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SUBDIR = mga r128 radeon tdfx # gamma i810 i830 sis
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.include <bsd.subdir.mk>
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.include <bsd.subdir.mk>
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@ -1,6 +1,6 @@
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# $FreeBSD$
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# $FreeBSD$
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# i810, i830 & sis are not complete
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# i810, i830 & sis are not complete
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SUBDIR = gamma mga r128 radeon tdfx # i810 i830 sis
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SUBDIR = mga r128 radeon tdfx # gamma i810 i830 sis
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.include <bsd.subdir.mk>
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.include <bsd.subdir.mk>
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71
bsd/gamma.h
71
bsd/gamma.h
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@ -1,71 +0,0 @@
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/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
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* Created: Mon Jan 4 08:58:31 1999 by gareth@valinux.com
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*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Gareth Hughes <gareth@valinux.com>
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*/
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#ifndef __GAMMA_H__
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#define __GAMMA_H__
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/* This remains constant for all DRM template files.
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*/
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#define DRM(x) gamma_##x
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/* General customization:
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*/
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#define __HAVE_MTRR 1
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/* DMA customization:
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*/
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#define __HAVE_DMA 1
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#define __HAVE_OLD_DMA 1
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#define __HAVE_PCI_DMA 1
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#define __HAVE_MULTIPLE_DMA_QUEUES 1
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#define __HAVE_DMA_WAITQUEUE 1
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#define __HAVE_DMA_WAITLIST 1
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#define __HAVE_DMA_FREELIST 1
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#define __HAVE_DMA_FLUSH 1
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#define __HAVE_DMA_SCHEDULE 1
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#define __HAVE_DMA_READY 1
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#define DRIVER_DMA_READY() do { \
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gamma_dma_ready(dev); \
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} while (0)
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#define __HAVE_DMA_QUIESCENT 1
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#define DRIVER_DMA_QUIESCENT() do { \
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/* FIXME ! */ \
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gamma_dma_quiescent_dual(dev); \
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return 0; \
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} while (0)
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#define __HAVE_DMA_IRQ 1
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#define __HAVE_DMA_IRQ_BH 1
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#endif /* __GAMMA_H__ */
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@ -1,23 +0,0 @@
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# $FreeBSD$
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.PATH: ${.CURDIR}/..
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KMOD = gamma
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NOMAN= YES
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SRCS = gamma_drv.c gamma_dma.c
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SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
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CFLAGS += ${DEBUG_FLAGS} -I. -I..
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.if defined(DRM_DEBUG)
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DRM_DEBUG_OPT= "\#define DRM_DEBUG 1"
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.endif
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.if !defined(DRM_NOLINUX)
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DRM_LINUX_OPT= "\#define DRM_LINUX 1"
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.endif
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opt_drm.h:
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touch opt_drm.h
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echo $(DRM_DEBUG_OPT) >> opt_drm.h
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echo $(DRM_LINUX_OPT) >> opt_drm.h
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.include <bsd.kmod.mk>
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611
bsd/gamma_dma.c
611
bsd/gamma_dma.c
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@ -1,611 +0,0 @@
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/* gamma_dma.c -- DMA support for GMX 2000 -*- linux-c -*-
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* Created: Fri Mar 19 14:30:16 1999 by faith@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Rickard E. (Rik) Faith <faith@valinux.com>
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*
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*/
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#include "gamma.h"
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#include "drmP.h"
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#include "drm.h"
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#include "gamma_drm.h"
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#include "gamma_drv.h"
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static __inline__ void gamma_dma_dispatch(drm_device_t *dev, unsigned long address,
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unsigned long length)
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{
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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GAMMA_WRITE(GAMMA_DMAADDRESS, DRM_VTOPHYS((void *)address));
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while (GAMMA_READ(GAMMA_GCOMMANDSTATUS) != 4)
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;
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GAMMA_WRITE(GAMMA_DMACOUNT, length / 4);
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}
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void gamma_dma_quiescent_single(drm_device_t *dev)
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{
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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while (GAMMA_READ(GAMMA_DMACOUNT))
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;
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while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
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;
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GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
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GAMMA_WRITE(GAMMA_SYNC, 0);
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do {
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while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
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;
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} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
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}
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void gamma_dma_quiescent_dual(drm_device_t *dev)
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{
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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while (GAMMA_READ(GAMMA_DMACOUNT))
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;
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while (GAMMA_READ(GAMMA_INFIFOSPACE) < 3)
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;
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GAMMA_WRITE(GAMMA_BROADCASTMASK, 3);
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GAMMA_WRITE(GAMMA_FILTERMODE, 1 << 10);
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GAMMA_WRITE(GAMMA_SYNC, 0);
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/* Read from first MX */
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do {
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while (!GAMMA_READ(GAMMA_OUTFIFOWORDS))
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;
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} while (GAMMA_READ(GAMMA_OUTPUTFIFO) != GAMMA_SYNC_TAG);
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/* Read from second MX */
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do {
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while (!GAMMA_READ(GAMMA_OUTFIFOWORDS + 0x10000))
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;
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} while (GAMMA_READ(GAMMA_OUTPUTFIFO + 0x10000) != GAMMA_SYNC_TAG);
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}
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void gamma_dma_ready(drm_device_t *dev)
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{
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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while (GAMMA_READ(GAMMA_DMACOUNT))
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;
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}
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static __inline__ int gamma_dma_is_ready(drm_device_t *dev)
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{
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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return !GAMMA_READ(GAMMA_DMACOUNT);
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}
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void gamma_dma_service( DRM_IRQ_ARGS)
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{
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drm_device_t *dev = (drm_device_t *)arg;
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drm_device_dma_t *dma = dev->dma;
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drm_gamma_private_t *dev_priv =
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(drm_gamma_private_t *)dev->dev_private;
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atomic_inc(&dev->counts[6]); /* _DRM_STAT_IRQ */
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GAMMA_WRITE(GAMMA_GDELAYTIMER, 0xc350/2); /* 0x05S */
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GAMMA_WRITE(GAMMA_GCOMMANDINTFLAGS, 8);
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GAMMA_WRITE(GAMMA_GINTFLAGS, 0x2001);
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if (gamma_dma_is_ready(dev)) {
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/* Free previous buffer */
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if (test_and_set_bit(0, &dev->dma_flag)) return;
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if (dma->this_buffer) {
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gamma_free_buffer(dev, dma->this_buffer);
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dma->this_buffer = NULL;
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}
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clear_bit(0, &dev->dma_flag);
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taskqueue_enqueue(taskqueue_swi, &dev->task);
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}
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}
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/* Only called by gamma_dma_schedule. */
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static int gamma_do_dma(drm_device_t *dev, int locked)
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{
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unsigned long address;
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unsigned long length;
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drm_buf_t *buf;
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int retcode = 0;
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drm_device_dma_t *dma = dev->dma;
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#if DRM_DMA_HISTOGRAM
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cycles_t dma_start, dma_stop;
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#endif
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if (test_and_set_bit(0, &dev->dma_flag)) return DRM_ERR( EBUSY );
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#if DRM_DMA_HISTOGRAM
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dma_start = get_cycles();
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#endif
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if (!dma->next_buffer) {
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DRM_ERROR("No next_buffer\n");
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clear_bit(0, &dev->dma_flag);
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return DRM_ERR( EINVAL );
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}
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buf = dma->next_buffer;
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address = (unsigned long)buf->address;
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length = buf->used;
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DRM_DEBUG("context %d, buffer %d (%ld bytes)\n",
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buf->context, buf->idx, length);
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if (buf->list == DRM_LIST_RECLAIM) {
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gamma_clear_next_buffer(dev);
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gamma_free_buffer(dev, buf);
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clear_bit(0, &dev->dma_flag);
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return DRM_ERR( EINVAL );
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}
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if (!length) {
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DRM_ERROR("0 length buffer\n");
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gamma_clear_next_buffer(dev);
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gamma_free_buffer(dev, buf);
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clear_bit(0, &dev->dma_flag);
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return 0;
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}
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if (!gamma_dma_is_ready(dev)) {
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clear_bit(0, &dev->dma_flag);
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return DRM_ERR( EBUSY );
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}
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if (buf->while_locked) {
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if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
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DRM_ERROR("Dispatching buffer %d from pid %d"
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" \"while locked\", but no lock held\n",
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buf->idx, buf->pid);
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}
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} else {
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if (!locked && !gamma_lock_take(&dev->lock.hw_lock->lock,
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DRM_KERNEL_CONTEXT)) {
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clear_bit(0, &dev->dma_flag);
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return DRM_ERR( EBUSY );
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}
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}
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if (dev->last_context != buf->context
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&& !(dev->queuelist[buf->context]->flags
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& _DRM_CONTEXT_PRESERVED)) {
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/* PRE: dev->last_context != buf->context */
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if (DRM(context_switch)(dev, dev->last_context,
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buf->context)) {
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DRM(clear_next_buffer)(dev);
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DRM(free_buffer)(dev, buf);
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}
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retcode = EBUSY;
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goto cleanup;
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/* POST: we will wait for the context
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switch and will dispatch on a later call
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when dev->last_context == buf->context.
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NOTE WE HOLD THE LOCK THROUGHOUT THIS
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TIME! */
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}
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gamma_clear_next_buffer(dev);
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buf->pending = 1;
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buf->waiting = 0;
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buf->list = DRM_LIST_PEND;
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#if DRM_DMA_HISTOGRAM
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buf->time_dispatched = get_cycles();
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#endif
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gamma_dma_dispatch(dev, address, length);
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gamma_free_buffer(dev, dma->this_buffer);
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dma->this_buffer = buf;
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atomic_inc(&dev->counts[7]); /* _DRM_STAT_DMA */
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atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */
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if (!buf->while_locked && !dev->context_flag && !locked) {
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if (gamma_lock_free(dev, &dev->lock.hw_lock->lock,
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DRM_KERNEL_CONTEXT)) {
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DRM_ERROR("\n");
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}
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}
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cleanup:
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clear_bit(0, &dev->dma_flag);
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#if DRM_DMA_HISTOGRAM
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dma_stop = get_cycles();
|
|
||||||
atomic_inc(&dev->histo.dma[gamma_histogram_slot(dma_stop - dma_start)]);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
return DRM_ERR( retcode );
|
|
||||||
}
|
|
||||||
|
|
||||||
static void gamma_dma_timer_bh(unsigned long dev)
|
|
||||||
{
|
|
||||||
gamma_dma_schedule((drm_device_t *)dev, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
void gamma_dma_immediate_bh(DRM_TASKQUEUE_ARGS)
|
|
||||||
{
|
|
||||||
gamma_dma_schedule(arg, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
int gamma_dma_schedule(drm_device_t *dev, int locked)
|
|
||||||
{
|
|
||||||
int next;
|
|
||||||
drm_queue_t *q;
|
|
||||||
drm_buf_t *buf;
|
|
||||||
int retcode = 0;
|
|
||||||
int processed = 0;
|
|
||||||
int missed;
|
|
||||||
int expire = 20;
|
|
||||||
drm_device_dma_t *dma = dev->dma;
|
|
||||||
#if DRM_DMA_HISTOGRAM
|
|
||||||
cycles_t schedule_start;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (test_and_set_bit(0, &dev->interrupt_flag)) {
|
|
||||||
/* Not reentrant */
|
|
||||||
atomic_inc(&dev->counts[10]); /* _DRM_STAT_MISSED */
|
|
||||||
return DRM_ERR( EBUSY );
|
|
||||||
}
|
|
||||||
missed = atomic_read(&dev->counts[10]);
|
|
||||||
|
|
||||||
#if DRM_DMA_HISTOGRAM
|
|
||||||
schedule_start = get_cycles();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
again:
|
|
||||||
if (dev->context_flag) {
|
|
||||||
clear_bit(0, &dev->interrupt_flag);
|
|
||||||
return DRM_ERR( EBUSY );
|
|
||||||
}
|
|
||||||
if (dma->next_buffer) {
|
|
||||||
/* Unsent buffer that was previously
|
|
||||||
selected, but that couldn't be sent
|
|
||||||
because the lock could not be obtained
|
|
||||||
or the DMA engine wasn't ready. Try
|
|
||||||
again. */
|
|
||||||
if (!(retcode = gamma_do_dma(dev, locked))) ++processed;
|
|
||||||
} else {
|
|
||||||
do {
|
|
||||||
next = gamma_select_queue(dev, gamma_dma_timer_bh);
|
|
||||||
if (next >= 0) {
|
|
||||||
q = dev->queuelist[next];
|
|
||||||
buf = gamma_waitlist_get(&q->waitlist);
|
|
||||||
dma->next_buffer = buf;
|
|
||||||
dma->next_queue = q;
|
|
||||||
if (buf && buf->list == DRM_LIST_RECLAIM) {
|
|
||||||
gamma_clear_next_buffer(dev);
|
|
||||||
gamma_free_buffer(dev, buf);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
} while (next >= 0 && !dma->next_buffer);
|
|
||||||
if (dma->next_buffer) {
|
|
||||||
if (!(retcode = gamma_do_dma(dev, locked))) {
|
|
||||||
++processed;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (--expire) {
|
|
||||||
if (missed != atomic_read(&dev->counts[10])) {
|
|
||||||
if (gamma_dma_is_ready(dev)) goto again;
|
|
||||||
}
|
|
||||||
if (processed && gamma_dma_is_ready(dev)) {
|
|
||||||
processed = 0;
|
|
||||||
goto again;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
clear_bit(0, &dev->interrupt_flag);
|
|
||||||
|
|
||||||
#if DRM_DMA_HISTOGRAM
|
|
||||||
atomic_inc(&dev->histo.schedule[gamma_histogram_slot(get_cycles()
|
|
||||||
- schedule_start)]);
|
|
||||||
#endif
|
|
||||||
return retcode;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int gamma_dma_priority(drm_device_t *dev, drm_dma_t *d)
|
|
||||||
{
|
|
||||||
unsigned long address;
|
|
||||||
unsigned long length;
|
|
||||||
int must_free = 0;
|
|
||||||
int retcode = 0;
|
|
||||||
int i;
|
|
||||||
int idx;
|
|
||||||
drm_buf_t *buf;
|
|
||||||
drm_buf_t *last_buf = NULL;
|
|
||||||
drm_device_dma_t *dma = dev->dma;
|
|
||||||
static int never;
|
|
||||||
|
|
||||||
/* Turn off interrupt handling */
|
|
||||||
while (test_and_set_bit(0, &dev->interrupt_flag)) {
|
|
||||||
retcode = tsleep(&never, PZERO|PCATCH, "gamp1", 1);
|
|
||||||
if (retcode)
|
|
||||||
return retcode;
|
|
||||||
}
|
|
||||||
if (!(d->flags & _DRM_DMA_WHILE_LOCKED)) {
|
|
||||||
while (!gamma_lock_take(&dev->lock.hw_lock->lock,
|
|
||||||
DRM_KERNEL_CONTEXT)) {
|
|
||||||
retcode = tsleep(&never, PZERO|PCATCH, "gamp2", 1);
|
|
||||||
if (retcode)
|
|
||||||
return retcode;
|
|
||||||
}
|
|
||||||
++must_free;
|
|
||||||
}
|
|
||||||
|
|
||||||
for (i = 0; i < d->send_count; i++) {
|
|
||||||
idx = d->send_indices[i];
|
|
||||||
if (idx < 0 || idx >= dma->buf_count) {
|
|
||||||
DRM_ERROR("Index %d (of %d max)\n",
|
|
||||||
d->send_indices[i], dma->buf_count - 1);
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
buf = dma->buflist[ idx ];
|
|
||||||
if (buf->pid != DRM_CURRENTPID) {
|
|
||||||
DRM_ERROR("Process %d using buffer owned by %d\n",
|
|
||||||
DRM_CURRENTPID, buf->pid);
|
|
||||||
retcode = EINVAL;
|
|
||||||
goto cleanup;
|
|
||||||
}
|
|
||||||
if (buf->list != DRM_LIST_NONE) {
|
|
||||||
DRM_ERROR("Process %d using %d's buffer on list %d\n",
|
|
||||||
DRM_CURRENTPID, buf->pid, buf->list);
|
|
||||||
retcode = EINVAL;
|
|
||||||
goto cleanup;
|
|
||||||
}
|
|
||||||
/* This isn't a race condition on
|
|
||||||
buf->list, since our concern is the
|
|
||||||
buffer reclaim during the time the
|
|
||||||
process closes the /dev/drm? handle, so
|
|
||||||
it can't also be doing DMA. */
|
|
||||||
buf->list = DRM_LIST_PRIO;
|
|
||||||
buf->used = d->send_sizes[i];
|
|
||||||
buf->context = d->context;
|
|
||||||
buf->while_locked = d->flags & _DRM_DMA_WHILE_LOCKED;
|
|
||||||
address = (unsigned long)buf->address;
|
|
||||||
length = buf->used;
|
|
||||||
if (!length) {
|
|
||||||
DRM_ERROR("0 length buffer\n");
|
|
||||||
}
|
|
||||||
if (buf->pending) {
|
|
||||||
DRM_ERROR("Sending pending buffer:"
|
|
||||||
" buffer %d, offset %d\n",
|
|
||||||
d->send_indices[i], i);
|
|
||||||
retcode = EINVAL;
|
|
||||||
goto cleanup;
|
|
||||||
}
|
|
||||||
if (buf->waiting) {
|
|
||||||
DRM_ERROR("Sending waiting buffer:"
|
|
||||||
" buffer %d, offset %d\n",
|
|
||||||
d->send_indices[i], i);
|
|
||||||
retcode = EINVAL;
|
|
||||||
goto cleanup;
|
|
||||||
}
|
|
||||||
buf->pending = 1;
|
|
||||||
|
|
||||||
if (dev->last_context != buf->context
|
|
||||||
&& !(dev->queuelist[buf->context]->flags
|
|
||||||
& _DRM_CONTEXT_PRESERVED)) {
|
|
||||||
/* PRE: dev->last_context != buf->context */
|
|
||||||
DRM(context_switch)(dev, dev->last_context,
|
|
||||||
buf->context);
|
|
||||||
/* POST: we will wait for the context
|
|
||||||
switch and will dispatch on a later call
|
|
||||||
when dev->last_context == buf->context.
|
|
||||||
NOTE WE HOLD THE LOCK THROUGHOUT THIS
|
|
||||||
TIME! */
|
|
||||||
retcode = tsleep(&dev->context_wait, PZERO|PCATCH,
|
|
||||||
"gamctx", 0);
|
|
||||||
if (retcode)
|
|
||||||
goto cleanup;
|
|
||||||
if (dev->last_context != buf->context) {
|
|
||||||
DRM_ERROR("Context mismatch: %d %d\n",
|
|
||||||
dev->last_context,
|
|
||||||
buf->context);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#if DRM_DMA_HISTOGRAM
|
|
||||||
buf->time_queued = get_cycles();
|
|
||||||
buf->time_dispatched = buf->time_queued;
|
|
||||||
#endif
|
|
||||||
gamma_dma_dispatch(dev, address, length);
|
|
||||||
atomic_inc(&dev->counts[9]); /* _DRM_STAT_SPECIAL */
|
|
||||||
atomic_add(length, &dev->counts[8]); /* _DRM_STAT_PRIMARY */
|
|
||||||
|
|
||||||
if (last_buf) {
|
|
||||||
gamma_free_buffer(dev, last_buf);
|
|
||||||
}
|
|
||||||
last_buf = buf;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
cleanup:
|
|
||||||
if (last_buf) {
|
|
||||||
gamma_dma_ready(dev);
|
|
||||||
gamma_free_buffer(dev, last_buf);
|
|
||||||
}
|
|
||||||
|
|
||||||
if (must_free && !dev->context_flag) {
|
|
||||||
if (gamma_lock_free(dev, &dev->lock.hw_lock->lock,
|
|
||||||
DRM_KERNEL_CONTEXT)) {
|
|
||||||
DRM_ERROR("\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
clear_bit(0, &dev->interrupt_flag);
|
|
||||||
return DRM_ERR( retcode );
|
|
||||||
}
|
|
||||||
|
|
||||||
static int gamma_dma_send_buffers(drm_device_t *dev, drm_dma_t *d)
|
|
||||||
{
|
|
||||||
drm_buf_t *last_buf = NULL;
|
|
||||||
int retcode = 0;
|
|
||||||
drm_device_dma_t *dma = dev->dma;
|
|
||||||
|
|
||||||
if (d->flags & _DRM_DMA_BLOCK) {
|
|
||||||
last_buf = dma->buflist[d->send_indices[d->send_count-1]];
|
|
||||||
atomic_inc(&last_buf->dma_wait);
|
|
||||||
}
|
|
||||||
|
|
||||||
if ((retcode = gamma_dma_enqueue(dev, d))) {
|
|
||||||
if (d->flags & _DRM_DMA_BLOCK)
|
|
||||||
atomic_dec(&last_buf->dma_wait);
|
|
||||||
return retcode;
|
|
||||||
}
|
|
||||||
|
|
||||||
gamma_dma_schedule(dev, 0);
|
|
||||||
|
|
||||||
if (d->flags & _DRM_DMA_BLOCK) {
|
|
||||||
DRM_DEBUG("%d waiting\n", DRM_CURRENTPID);
|
|
||||||
for (;;) {
|
|
||||||
retcode = tsleep(&last_buf->dma_wait, PZERO|PCATCH,
|
|
||||||
"gamdw", 0);
|
|
||||||
if (!last_buf->waiting
|
|
||||||
&& !last_buf->pending)
|
|
||||||
break; /* finished */
|
|
||||||
if (retcode)
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
atomic_dec(&last_buf->dma_wait);
|
|
||||||
DRM_DEBUG("%d running\n", DRM_CURRENTPID);
|
|
||||||
if (!retcode
|
|
||||||
|| (last_buf->list==DRM_LIST_PEND && !last_buf->pending)) {
|
|
||||||
if (!last_buf->dma_wait) {
|
|
||||||
gamma_free_buffer(dev, last_buf);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (retcode) {
|
|
||||||
DRM_ERROR("ctx%d w%d p%d c%d i%d l%d %d/%d\n",
|
|
||||||
d->context,
|
|
||||||
last_buf->waiting,
|
|
||||||
last_buf->pending,
|
|
||||||
DRM_WAITCOUNT(dev, d->context),
|
|
||||||
last_buf->idx,
|
|
||||||
last_buf->list,
|
|
||||||
last_buf->pid,
|
|
||||||
DRM_CURRENTPID);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
return DRM_ERR( retcode );
|
|
||||||
}
|
|
||||||
|
|
||||||
int gamma_dma( DRM_IOCTL_ARGS )
|
|
||||||
{
|
|
||||||
DRM_DEVICE;
|
|
||||||
drm_device_dma_t *dma = dev->dma;
|
|
||||||
int retcode = 0;
|
|
||||||
drm_dma_t d;
|
|
||||||
|
|
||||||
DRM_COPY_FROM_USER_IOCTL(d, (drm_dma_t *) data, sizeof(d));
|
|
||||||
|
|
||||||
if (d.send_count < 0 || d.send_count > dma->buf_count) {
|
|
||||||
DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n",
|
|
||||||
DRM_CURRENTPID, d.send_count, dma->buf_count);
|
|
||||||
return DRM_ERR( EINVAL );
|
|
||||||
}
|
|
||||||
|
|
||||||
if (d.request_count < 0 || d.request_count > dma->buf_count) {
|
|
||||||
DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
|
|
||||||
DRM_CURRENTPID, d.request_count, dma->buf_count);
|
|
||||||
return DRM_ERR( EINVAL );
|
|
||||||
}
|
|
||||||
|
|
||||||
if (d.send_count) {
|
|
||||||
if (d.flags & _DRM_DMA_PRIORITY)
|
|
||||||
retcode = gamma_dma_priority(dev, &d);
|
|
||||||
else
|
|
||||||
retcode = gamma_dma_send_buffers(dev, &d);
|
|
||||||
}
|
|
||||||
|
|
||||||
d.granted_count = 0;
|
|
||||||
|
|
||||||
if (!retcode && d.request_count) {
|
|
||||||
retcode = gamma_dma_get_buffers(dev, &d);
|
|
||||||
}
|
|
||||||
|
|
||||||
DRM_DEBUG("%d returning, granted = %d\n",
|
|
||||||
DRM_CURRENTPID, d.granted_count);
|
|
||||||
DRM_COPY_TO_USER_IOCTL((drm_dma_t *) data, d, sizeof(d));
|
|
||||||
|
|
||||||
return retcode;
|
|
||||||
}
|
|
||||||
|
|
||||||
void DRM(driver_irq_preinstall)(drm_device_t *dev) {
|
|
||||||
drm_gamma_private_t *dev_priv =
|
|
||||||
(drm_gamma_private_t *)dev->dev_private;
|
|
||||||
#if 1
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
GAMMA_WRITE( GAMMA_GCOMMANDMODE, 0x00000004 );
|
|
||||||
GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );
|
|
||||||
#else
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
GAMMA_WRITE( GAMMA_GCOMMANDMODE, GAMMA_QUEUED_DMA_MODE );
|
|
||||||
GAMMA_WRITE( GAMMA_GDMACONTROL, 0x00000000 );
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void DRM(driver_irq_postinstall)(drm_device_t *dev) {
|
|
||||||
drm_gamma_private_t *dev_priv =
|
|
||||||
(drm_gamma_private_t *)dev->dev_private;
|
|
||||||
#if 1
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3);
|
|
||||||
GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002001 );
|
|
||||||
GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000008 );
|
|
||||||
GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00039090 );
|
|
||||||
#else
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
GAMMA_WRITE( GAMMA_GINTENABLE, 0x00002000 );
|
|
||||||
GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000004 );
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void DRM(driver_irq_uninstall)( drm_device_t *dev ) {
|
|
||||||
drm_gamma_private_t *dev_priv =
|
|
||||||
(drm_gamma_private_t *)dev->dev_private;
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 2);
|
|
||||||
while(GAMMA_READ(GAMMA_INFIFOSPACE) < 3);
|
|
||||||
GAMMA_WRITE( GAMMA_GDELAYTIMER, 0x00000000 );
|
|
||||||
GAMMA_WRITE( GAMMA_COMMANDINTENABLE, 0x00000000 );
|
|
||||||
GAMMA_WRITE( GAMMA_GINTENABLE, 0x00000000 );
|
|
||||||
}
|
|
||||||
|
|
@ -1,89 +0,0 @@
|
||||||
#ifndef _GAMMA_DRM_H_
|
|
||||||
#define _GAMMA_DRM_H_
|
|
||||||
|
|
||||||
typedef struct _drm_gamma_tex_region {
|
|
||||||
unsigned char next, prev; /* indices to form a circular LRU */
|
|
||||||
unsigned char in_use; /* owned by a client, or free? */
|
|
||||||
int age; /* tracked by clients to update local LRU's */
|
|
||||||
} drm_gamma_tex_region_t;
|
|
||||||
|
|
||||||
typedef struct {
|
|
||||||
unsigned int GDeltaMode;
|
|
||||||
unsigned int GDepthMode;
|
|
||||||
unsigned int GGeometryMode;
|
|
||||||
unsigned int GTransformMode;
|
|
||||||
} drm_gamma_context_regs_t;
|
|
||||||
|
|
||||||
typedef struct _drm_gamma_sarea {
|
|
||||||
drm_gamma_context_regs_t context_state;
|
|
||||||
|
|
||||||
unsigned int dirty;
|
|
||||||
|
|
||||||
|
|
||||||
/* Maintain an LRU of contiguous regions of texture space. If
|
|
||||||
* you think you own a region of texture memory, and it has an
|
|
||||||
* age different to the one you set, then you are mistaken and
|
|
||||||
* it has been stolen by another client. If global texAge
|
|
||||||
* hasn't changed, there is no need to walk the list.
|
|
||||||
*
|
|
||||||
* These regions can be used as a proxy for the fine-grained
|
|
||||||
* texture information of other clients - by maintaining them
|
|
||||||
* in the same lru which is used to age their own textures,
|
|
||||||
* clients have an approximate lru for the whole of global
|
|
||||||
* texture space, and can make informed decisions as to which
|
|
||||||
* areas to kick out. There is no need to choose whether to
|
|
||||||
* kick out your own texture or someone else's - simply eject
|
|
||||||
* them all in LRU order.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define GAMMA_NR_TEX_REGIONS 64
|
|
||||||
drm_gamma_tex_region_t texList[GAMMA_NR_TEX_REGIONS+1];
|
|
||||||
/* Last elt is sentinal */
|
|
||||||
int texAge; /* last time texture was uploaded */
|
|
||||||
int last_enqueue; /* last time a buffer was enqueued */
|
|
||||||
int last_dispatch; /* age of the most recently dispatched buffer */
|
|
||||||
int last_quiescent; /* */
|
|
||||||
int ctxOwner; /* last context to upload state */
|
|
||||||
|
|
||||||
int vertex_prim;
|
|
||||||
} drm_gamma_sarea_t;
|
|
||||||
|
|
||||||
/* WARNING: If you change any of these defines, make sure to change the
|
|
||||||
* defines in the Xserver file (xf86drmGamma.h)
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* Gamma specific ioctls
|
|
||||||
* The device specific ioctl range is 0x40 to 0x79.
|
|
||||||
*/
|
|
||||||
#define DRM_IOCTL_GAMMA_INIT DRM_IOW( 0x40, drm_gamma_init_t)
|
|
||||||
#define DRM_IOCTL_GAMMA_COPY DRM_IOW( 0x41, drm_gamma_copy_t)
|
|
||||||
|
|
||||||
typedef struct drm_gamma_copy {
|
|
||||||
unsigned int DMAOutputAddress;
|
|
||||||
unsigned int DMAOutputCount;
|
|
||||||
unsigned int DMAReadGLINTSource;
|
|
||||||
unsigned int DMARectangleWriteAddress;
|
|
||||||
unsigned int DMARectangleWriteLinePitch;
|
|
||||||
unsigned int DMARectangleWrite;
|
|
||||||
unsigned int DMARectangleReadAddress;
|
|
||||||
unsigned int DMARectangleReadLinePitch;
|
|
||||||
unsigned int DMARectangleRead;
|
|
||||||
unsigned int DMARectangleReadTarget;
|
|
||||||
} drm_gamma_copy_t;
|
|
||||||
|
|
||||||
typedef struct drm_gamma_init {
|
|
||||||
enum {
|
|
||||||
GAMMA_INIT_DMA = 0x01,
|
|
||||||
GAMMA_CLEANUP_DMA = 0x02
|
|
||||||
} func;
|
|
||||||
|
|
||||||
int sarea_priv_offset;
|
|
||||||
int pcimode;
|
|
||||||
unsigned int mmio0;
|
|
||||||
unsigned int mmio1;
|
|
||||||
unsigned int mmio2;
|
|
||||||
unsigned int mmio3;
|
|
||||||
unsigned int buffers_offset;
|
|
||||||
} drm_gamma_init_t;
|
|
||||||
|
|
||||||
#endif /* _GAMMA_DRM_H_ */
|
|
||||||
|
|
@ -1,86 +0,0 @@
|
||||||
/* gamma.c -- 3dlabs GMX 2000 driver -*- linux-c -*-
|
|
||||||
* Created: Mon Jan 4 08:58:31 1999 by faith@precisioninsight.com
|
|
||||||
*
|
|
||||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
|
||||||
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
|
|
||||||
* All Rights Reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
|
||||||
* to deal in the Software without restriction, including without limitation
|
|
||||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
||||||
* and/or sell copies of the Software, and to permit persons to whom the
|
|
||||||
* Software is furnished to do so, subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the next
|
|
||||||
* paragraph) shall be included in all copies or substantial portions of the
|
|
||||||
* Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
||||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
||||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
||||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
||||||
* DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
* Authors:
|
|
||||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
|
||||||
* Gareth Hughes <gareth@valinux.com>
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <sys/types.h>
|
|
||||||
#include "gamma.h"
|
|
||||||
#include "drmP.h"
|
|
||||||
#include "drm.h"
|
|
||||||
#include "gamma_drm.h"
|
|
||||||
#include "gamma_drv.h"
|
|
||||||
|
|
||||||
#define DRIVER_AUTHOR "VA Linux Systems Inc."
|
|
||||||
|
|
||||||
#define DRIVER_NAME "gamma"
|
|
||||||
#define DRIVER_DESC "3DLabs gamma"
|
|
||||||
#define DRIVER_DATE "20010216"
|
|
||||||
|
|
||||||
#define DRIVER_MAJOR 1
|
|
||||||
#define DRIVER_MINOR 0
|
|
||||||
#define DRIVER_PATCHLEVEL 0
|
|
||||||
|
|
||||||
#define DRIVER_IOCTLS \
|
|
||||||
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { gamma_dma, 1, 0 }
|
|
||||||
|
|
||||||
/* List acquired from http://www.yourvote.com/pci/pcihdr.h and xc/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
|
|
||||||
* Please report to anholt@teleport.com inaccuracies or if a chip you have works that is marked unsupported here.
|
|
||||||
*/
|
|
||||||
drm_chipinfo_t DRM(devicelist)[] = {
|
|
||||||
{0x3d3d, 0x0008, 1, "3DLabs Gamma"},
|
|
||||||
{0, 0, 0, NULL}
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#define __HAVE_COUNTERS 5
|
|
||||||
#define __HAVE_COUNTER6 _DRM_STAT_IRQ
|
|
||||||
#define __HAVE_COUNTER7 _DRM_STAT_DMA
|
|
||||||
#define __HAVE_COUNTER8 _DRM_STAT_PRIMARY
|
|
||||||
#define __HAVE_COUNTER9 _DRM_STAT_SPECIAL
|
|
||||||
#define __HAVE_COUNTER10 _DRM_STAT_MISSED
|
|
||||||
|
|
||||||
|
|
||||||
#include "drm_auth.h"
|
|
||||||
#include "drm_bufs.h"
|
|
||||||
#include "drm_context.h"
|
|
||||||
#include "drm_dma.h"
|
|
||||||
#include "drm_drawable.h"
|
|
||||||
#include "drm_drv.h"
|
|
||||||
|
|
||||||
|
|
||||||
#include "drm_fops.h"
|
|
||||||
#include "drm_init.h"
|
|
||||||
#include "drm_ioctl.h"
|
|
||||||
#include "drm_lists.h"
|
|
||||||
#include "drm_lock.h"
|
|
||||||
#include "drm_memory.h"
|
|
||||||
#include "drm_vm.h"
|
|
||||||
#include "drm_sysctl.h"
|
|
||||||
|
|
||||||
DRIVER_MODULE(gamma, pci, gamma_driver, gamma_devclass, 0, 0);
|
|
||||||
104
bsd/gamma_drv.h
104
bsd/gamma_drv.h
|
|
@ -1,104 +0,0 @@
|
||||||
/* gamma_drv.h -- Private header for 3dlabs GMX 2000 driver -*- linux-c -*-
|
|
||||||
* Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com
|
|
||||||
*
|
|
||||||
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
|
|
||||||
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
|
|
||||||
* All rights reserved.
|
|
||||||
*
|
|
||||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
||||||
* copy of this software and associated documentation files (the "Software"),
|
|
||||||
* to deal in the Software without restriction, including without limitation
|
|
||||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
||||||
* and/or sell copies of the Software, and to permit persons to whom the
|
|
||||||
* Software is furnished to do so, subject to the following conditions:
|
|
||||||
*
|
|
||||||
* The above copyright notice and this permission notice (including the next
|
|
||||||
* paragraph) shall be included in all copies or substantial portions of the
|
|
||||||
* Software.
|
|
||||||
*
|
|
||||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
||||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
||||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
||||||
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
|
|
||||||
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
|
|
||||||
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
||||||
* DEALINGS IN THE SOFTWARE.
|
|
||||||
*
|
|
||||||
* Authors:
|
|
||||||
* Rickard E. (Rik) Faith <faith@valinux.com>
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _GAMMA_DRV_H_
|
|
||||||
#define _GAMMA_DRV_H_
|
|
||||||
|
|
||||||
|
|
||||||
typedef struct drm_gamma_private {
|
|
||||||
drm_map_t *buffers;
|
|
||||||
drm_map_t *mmio0;
|
|
||||||
drm_map_t *mmio1;
|
|
||||||
drm_map_t *mmio2;
|
|
||||||
drm_map_t *mmio3;
|
|
||||||
} drm_gamma_private_t;
|
|
||||||
|
|
||||||
#define LOCK_TEST_WITH_RETURN( dev ) \
|
|
||||||
do { \
|
|
||||||
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
|
|
||||||
dev->lock.pid != DRM_CURRENTPID ) { \
|
|
||||||
DRM_ERROR( "%s called without lock held\n", \
|
|
||||||
__FUNCTION__ ); \
|
|
||||||
return DRM_ERR( EINVAL ); \
|
|
||||||
} \
|
|
||||||
} while (0)
|
|
||||||
|
|
||||||
|
|
||||||
extern void gamma_dma_ready(drm_device_t *dev);
|
|
||||||
extern void gamma_dma_quiescent_single(drm_device_t *dev);
|
|
||||||
extern void gamma_dma_quiescent_dual(drm_device_t *dev);
|
|
||||||
|
|
||||||
/* gamma_dma.c */
|
|
||||||
extern int gamma_dma_schedule(drm_device_t *dev, int locked);
|
|
||||||
extern int gamma_dma( DRM_IOCTL_ARGS );
|
|
||||||
extern int gamma_find_devices(void);
|
|
||||||
extern int gamma_found(void);
|
|
||||||
|
|
||||||
|
|
||||||
#define GAMMA_OFF(reg) \
|
|
||||||
((reg < 0x1000) \
|
|
||||||
? reg \
|
|
||||||
: ((reg < 0x10000) \
|
|
||||||
? (reg - 0x1000) \
|
|
||||||
: ((reg < 0x11000) \
|
|
||||||
? (reg - 0x10000) \
|
|
||||||
: (reg - 0x11000))))
|
|
||||||
|
|
||||||
#define GAMMA_BASE(reg) ((unsigned long) \
|
|
||||||
((reg < 0x1000) ? dev_priv->mmio0->handle : \
|
|
||||||
((reg < 0x10000) ? dev_priv->mmio1->handle : \
|
|
||||||
((reg < 0x11000) ? dev_priv->mmio2->handle : \
|
|
||||||
dev_priv->mmio3->handle))))
|
|
||||||
|
|
||||||
#define GAMMA_ADDR(reg) (GAMMA_BASE(reg) + GAMMA_OFF(reg))
|
|
||||||
#define GAMMA_DEREF(reg) *(__volatile__ int *)GAMMA_ADDR(reg)
|
|
||||||
#define GAMMA_READ(reg) GAMMA_DEREF(reg)
|
|
||||||
#define GAMMA_WRITE(reg,val) do { GAMMA_DEREF(reg) = val; } while (0)
|
|
||||||
|
|
||||||
#define GAMMA_BROADCASTMASK 0x9378
|
|
||||||
#define GAMMA_COMMANDINTENABLE 0x0c48
|
|
||||||
#define GAMMA_DMAADDRESS 0x0028
|
|
||||||
#define GAMMA_DMACOUNT 0x0030
|
|
||||||
#define GAMMA_FILTERMODE 0x8c00
|
|
||||||
#define GAMMA_GCOMMANDINTFLAGS 0x0c50
|
|
||||||
#define GAMMA_GCOMMANDMODE 0x0c40
|
|
||||||
#define GAMMA_GCOMMANDSTATUS 0x0c60
|
|
||||||
#define GAMMA_GDELAYTIMER 0x0c38
|
|
||||||
#define GAMMA_GDMACONTROL 0x0060
|
|
||||||
#define GAMMA_GINTENABLE 0x0808
|
|
||||||
#define GAMMA_GINTFLAGS 0x0810
|
|
||||||
#define GAMMA_INFIFOSPACE 0x0018
|
|
||||||
#define GAMMA_OUTFIFOWORDS 0x0020
|
|
||||||
#define GAMMA_OUTPUTFIFO 0x2000
|
|
||||||
#define GAMMA_SYNC 0x8c40
|
|
||||||
#define GAMMA_SYNC_TAG 0x0188
|
|
||||||
|
|
||||||
#endif
|
|
||||||
Loading…
Add table
Reference in a new issue