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https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-05 06:38:03 +02:00
Add aperture size and preallocation probing (from intelfb), cleanup load code to be more general.
This commit is contained in:
Jesse Barnes
parent
63d4d40463
commit
8dd75bd601
2 changed files with 140 additions and 13 deletions
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@ -318,6 +318,27 @@ extern void intel_modeset_cleanup(drm_device_t *dev);
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extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller);
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/*
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* The Bridge device's PCI config space has information about the
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* fb aperture size and the amount of pre-reserved memory.
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*/
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#define INTEL_GMCH_CTRL 0x52
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#define INTEL_GMCH_ENABLED 0x4
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#define INTEL_GMCH_MEM_MASK 0x1
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#define INTEL_GMCH_MEM_64M 0x1
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#define INTEL_GMCH_MEM_128M 0
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#define INTEL_855_GMCH_GMS_MASK (0x7 << 4)
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#define INTEL_855_GMCH_GMS_DISABLED (0x0 << 4)
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#define INTEL_855_GMCH_GMS_STOLEN_1M (0x1 << 4)
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#define INTEL_855_GMCH_GMS_STOLEN_4M (0x2 << 4)
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#define INTEL_855_GMCH_GMS_STOLEN_8M (0x3 << 4)
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#define INTEL_855_GMCH_GMS_STOLEN_16M (0x4 << 4)
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#define INTEL_855_GMCH_GMS_STOLEN_32M (0x5 << 4)
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#define INTEL_915G_GMCH_GMS_STOLEN_48M (0x6 << 4)
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#define INTEL_915G_GMCH_GMS_STOLEN_64M (0x7 << 4)
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#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
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#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
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#define CMD_REPORT_HEAD (7<<23)
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@ -1,9 +1,108 @@
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/*
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* Copyright (c) 2007 Intel Corporation
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* Jesse Barnes <jesse.barnes@intel.com>
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*
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* Copyright © 2002, 2003 David Dawes <dawes@xfree86.org>
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* 2004 Sylvain Meyer
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*
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* GPL/BSD dual license
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*/
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#include "drmP.h"
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#include "drm.h"
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#include "drm_sarea.h"
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#include "i915_drm.h"
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#include "i915_drv.h"
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/**
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* i915_probe_agp - get AGP bootup configuration
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* @pdev: PCI device
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* @aperture_size: returns AGP aperture configured size
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* @preallocated_size: returns size of BIOS preallocated AGP space
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*
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* Since Intel integrated graphics are UMA, the BIOS has to set aside
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* some RAM for the framebuffer at early boot. This code figures out
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* how much was set aside so we can use it for our own purposes.
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*/
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int i915_probe_agp(struct pci_dev *pdev, unsigned long *aperture_size,
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unsigned long *preallocated_size)
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{
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struct pci_dev *bridge_dev;
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u16 tmp = 0;
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unsigned long overhead;
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bridge_dev = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
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if (!bridge_dev) {
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DRM_ERROR("bridge device not found\n");
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return -1;
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}
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/* Get the fb aperture size and "stolen" memory amount. */
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pci_read_config_word(bridge_dev, INTEL_GMCH_CTRL, &tmp);
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pci_dev_put(bridge_dev);
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*aperture_size = 1024 * 1024;
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*preallocated_size = 1024 * 1024;
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switch (pdev->device) {
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case PCI_DEVICE_ID_INTEL_82915G_IG:
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case PCI_DEVICE_ID_INTEL_82915GM_IG:
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case PCI_DEVICE_ID_INTEL_82945G_IG:
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case PCI_DEVICE_ID_INTEL_82945GM_IG:
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/* 915 and 945 chipsets support a 256MB aperture.
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Aperture size is determined by inspected the
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base address of the aperture. */
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if (pci_resource_start(pdev, 2) & 0x08000000)
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*aperture_size *= 128;
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else
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*aperture_size *= 256;
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break;
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default:
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if ((tmp & INTEL_GMCH_MEM_MASK) == INTEL_GMCH_MEM_64M)
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*aperture_size *= 64;
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else
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*aperture_size *= 128;
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break;
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}
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/*
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* Some of the preallocated space is taken by the GTT
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* and popup. GTT is 1K per MB of aperture size, and popup is 4K.
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*/
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overhead = (*aperture_size / 1024) + 4096;
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switch (tmp & INTEL_855_GMCH_GMS_MASK) {
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case INTEL_855_GMCH_GMS_STOLEN_1M:
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break; /* 1M already */
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case INTEL_855_GMCH_GMS_STOLEN_4M:
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*preallocated_size *= 4;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_8M:
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*preallocated_size *= 8;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_16M:
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*preallocated_size *= 16;
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break;
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case INTEL_855_GMCH_GMS_STOLEN_32M:
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*preallocated_size *= 32;
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break;
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case INTEL_915G_GMCH_GMS_STOLEN_48M:
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*preallocated_size *= 48;
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break;
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case INTEL_915G_GMCH_GMS_STOLEN_64M:
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*preallocated_size *= 64;
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break;
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case INTEL_855_GMCH_GMS_DISABLED:
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DRM_ERROR("video memory is disabled\n");
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return -1;
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default:
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DRM_ERROR("unexpected GMCH_GMS value: 0x%02x\n",
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tmp & INTEL_855_GMCH_GMS_MASK);
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return -1;
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}
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*preallocated_size -= overhead;
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return 0;
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}
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/**
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* i915_driver_load - setup chip and create an initial config
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* @dev: DRM device
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@ -21,7 +120,8 @@ int i915_driver_load(drm_device_t *dev, unsigned long flags)
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drm_i915_init_t init;
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drm_buffer_object_t *entry;
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struct drm_framebuffer *fb;
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int ret;
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unsigned long agp_size, prealloc_size;
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int hsize, vsize, bytes_per_pixel, size, ret;
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dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
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if (dev_priv == NULL)
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@ -41,11 +141,13 @@ int i915_driver_load(drm_device_t *dev, unsigned long flags)
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if (IS_I9XX(dev)) {
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dev_priv->mmiobase = drm_get_resource_start(dev, 0);
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dev_priv->mmiolen = drm_get_resource_len(dev, 0);
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dev->mode_config.fb_base = dev_priv->baseaddr = drm_get_resource_start(dev, 2) & 0xff000000;
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dev->mode_config.fb_base = dev_priv->baseaddr =
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drm_get_resource_start(dev, 2) & 0xff000000;
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} else if (drm_get_resource_start(dev, 1)) {
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dev_priv->mmiobase = drm_get_resource_start(dev, 1);
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dev_priv->mmiolen = drm_get_resource_len(dev, 1);
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dev->mode_config.fb_base = dev_priv->baseaddr = drm_get_resource_start(dev, 0) & 0xff000000;
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dev->mode_config.fb_base = dev_priv->baseaddr =
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drm_get_resource_start(dev, 0) & 0xff000000;
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} else {
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DRM_ERROR("Unable to find MMIO registers\n");
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return -ENODEV;
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@ -79,14 +181,18 @@ int i915_driver_load(drm_device_t *dev, unsigned long flags)
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* Initialize the memory manager for local and AGP space
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*/
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drm_bo_driver_init(dev);
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/* FIXME: initial stolen area 8M init */
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#define SCANOUT_SIZE 1024*1024*8 /* big enough for 2048x1024 32bpp */
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drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0, dev->mode_config.fb_base,
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SCANOUT_SIZE);
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i915_probe_agp(dev->pdev, &agp_size, &prealloc_size);
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drm_bo_init_mm(dev, DRM_BO_MEM_PRIV0, dev_priv->baseaddr,
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prealloc_size);
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/* Allocate scanout buffer and command ring */
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/* FIXME: types and other args correct? */
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drm_buffer_object_create(dev, SCANOUT_SIZE, drm_bo_type_dc,
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hsize = 1280;
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vsize = 800;
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bytes_per_pixel = 4;
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size = hsize * vsize * bytes_per_pixel;
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drm_buffer_object_create(dev, size, drm_bo_type_dc,
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DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE |
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DRM_BO_FLAG_MEM_PRIV0 | DRM_BO_FLAG_NO_MOVE,
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0, PAGE_SIZE, 0,
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@ -102,11 +208,11 @@ int i915_driver_load(drm_device_t *dev, unsigned long flags)
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return -EINVAL;
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}
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fb->width = 1024;
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fb->height = 768;
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fb->pitch = 1024;
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fb->bits_per_pixel = 32;
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fb->depth = 32;
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fb->width = hsize;
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fb->height = vsize;
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fb->pitch = hsize;
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fb->bits_per_pixel = bytes_per_pixel * 8;
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fb->depth = bytes_per_pixel * 8;
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fb->offset = entry->offset;
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fb->bo = entry;
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