mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 07:00:11 +01:00
first attempt to fix PCI GART and PPC (client side still broken for PPC)
This commit is contained in:
parent
033735ef46
commit
797dbc850c
14 changed files with 83 additions and 42 deletions
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@ -997,6 +997,28 @@ unsigned int drmAgpDeviceId(int fd)
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return i.id_device;
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return i.id_device;
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}
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}
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int drmScatterGatherAlloc(int fd, unsigned long size,
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unsigned long *handle)
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{
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drm_agp_buffer_t b;
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*handle = 0;
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b.size = size;
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b.handle = 0;
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if (ioctl(fd, DRM_IOCTL_SG_ALLOC, &b)) return -errno;
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*handle = b.handle;
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return 0;
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}
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int drmScatterGatherFree(int fd, unsigned long handle)
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{
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drm_agp_buffer_t b;
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b.size = 0;
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b.handle = handle;
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if (ioctl(fd, DRM_IOCTL_SG_FREE, &b)) return -errno;
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return 0;
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}
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int drmError(int err, const char *label)
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int drmError(int err, const char *label)
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{
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{
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switch (err) {
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switch (err) {
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@ -144,6 +144,7 @@
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#define DRM_MEM_BOUNDAGP 17
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#define DRM_MEM_BOUNDAGP 17
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#define DRM_MEM_CTXBITMAP 18
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#define DRM_MEM_CTXBITMAP 18
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#define DRM_MEM_STUB 19
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#define DRM_MEM_STUB 19
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#define DRM_MEM_SGLISTS 20
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#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
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#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
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@ -540,7 +541,8 @@ typedef struct drm_device_dma {
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unsigned long *pagelist;
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unsigned long *pagelist;
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unsigned long byte_count;
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unsigned long byte_count;
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enum {
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enum {
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_DRM_DMA_USE_AGP = 0x01
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_DRM_DMA_USE_AGP = 0x01,
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_DRM_DMA_USE_SG = 0x02
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} flags;
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} flags;
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/* DMA support */
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/* DMA support */
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@ -136,7 +136,7 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
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#endif
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#endif
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case _DRM_SCATTER_GATHER:
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case _DRM_SCATTER_GATHER:
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if (!dev->sg) {
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if (!dev->sg) {
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drm_free(map, sizeof(*map), DRM_MEM_MAPS);
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DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
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return -EINVAL;
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return -EINVAL;
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}
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}
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map->offset = map->offset + dev->sg->handle;
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map->offset = map->offset + dev->sg->handle;
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@ -63,6 +63,7 @@ static drm_mem_stats_t DRM(mem_stats)[] = {
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[DRM_MEM_MAPPINGS] = { "mappings" },
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[DRM_MEM_MAPPINGS] = { "mappings" },
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[DRM_MEM_BUFLISTS] = { "buflists" },
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[DRM_MEM_BUFLISTS] = { "buflists" },
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[DRM_MEM_AGPLISTS] = { "agplist" },
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[DRM_MEM_AGPLISTS] = { "agplist" },
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[DRM_MEM_SGLISTS] = { "sglist" },
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[DRM_MEM_TOTALAGP] = { "totalagp" },
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[DRM_MEM_TOTALAGP] = { "totalagp" },
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[DRM_MEM_BOUNDAGP] = { "boundagp" },
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[DRM_MEM_BOUNDAGP] = { "boundagp" },
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[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
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[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
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@ -33,6 +33,7 @@
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#include "r128.h"
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#include "r128.h"
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#include "drmP.h"
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#include "drmP.h"
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#include "r128_drv.h"
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#include "r128_drv.h"
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#include "ati_pcigart.h"
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#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
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#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
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@ -86,5 +87,6 @@
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#include "drm_lock.h"
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#include "drm_lock.h"
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#include "drm_memory.h"
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#include "drm_memory.h"
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#include "drm_proc.h"
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#include "drm_proc.h"
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#include "drm_scatter.h"
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#include "drm_vm.h"
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#include "drm_vm.h"
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#include "drm_stub.h"
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#include "drm_stub.h"
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@ -47,7 +47,7 @@
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# **** End of SMP/MODVERSIONS detection
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# **** End of SMP/MODVERSIONS detection
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MODS = gamma.o tdfx.o
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MODS = gamma.o tdfx.o r128.o
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LIBS =
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LIBS =
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DRMTEMPLATES = drm_auth.h drm_bufs.h drm_context.h drm_dma.h drm_drawable.h \
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DRMTEMPLATES = drm_auth.h drm_bufs.h drm_context.h drm_dma.h drm_drawable.h \
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@ -58,6 +58,9 @@ DRMHEADERS = drm.h drmP.h compat-pre24.h
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GAMMAOBJS = gamma_drv.o gamma_dma.o
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GAMMAOBJS = gamma_drv.o gamma_dma.o
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GAMMAHEADERS = gamma_drv.h $(DRMHEADERS) $(DRMTEMPLATES)
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GAMMAHEADERS = gamma_drv.h $(DRMHEADERS) $(DRMTEMPLATES)
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R128OBJS = r128_drv.o r128_cce.o r128_state.o
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R128HEADERS = r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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TDFXOBJS = tdfx_drv.o
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TDFXOBJS = tdfx_drv.o
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TDFXHEADERS = tdfx.h $(DRMHEADERS)
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TDFXHEADERS = tdfx.h $(DRMHEADERS)
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@ -132,7 +135,7 @@ ifeq ($(AGP),1)
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MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
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MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
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DRMTEMPLATES += drm_agpsupport.h
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DRMTEMPLATES += drm_agpsupport.h
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DRMHEADERS += agpsupport-pre24.h
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DRMHEADERS += agpsupport-pre24.h
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MODS += mga.o r128.o radeon.o
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MODS += mga.o radeon.o
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ifeq ($(MACHINE),i386)
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ifeq ($(MACHINE),i386)
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MODS += i810.o
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MODS += i810.o
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endif
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endif
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@ -147,9 +150,6 @@ MGAHEADERS = mga.h mga_drv.h mga_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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I810OBJS = i810_drv.o i810_dma.o
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I810OBJS = i810_drv.o i810_dma.o
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I810HEADERS = i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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I810HEADERS = i810.h i810_drv.h i810_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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R128OBJS = r128_drv.o r128_cce.o r128_state.o
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R128HEADERS = r128.h r128_drv.h r128_drm.h $(DRMHEADERS) $(DRMTEMPLATES)
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RADEONOBJS = radeon_drv.o radeon_cp.o radeon_state.o
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RADEONOBJS = radeon_drv.o radeon_cp.o radeon_state.o
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RADEONHEADERS = radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \
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RADEONHEADERS = radeon.h radeon_drv.h radeon_drm.h $(DRMHEADERS) \
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$(DRMTEMPLATES)
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$(DRMTEMPLATES)
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@ -210,6 +210,11 @@ gamma_drv.o: gamma_drv.c
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gamma.o: $(GAMMAOBJS)
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gamma.o: $(GAMMAOBJS)
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$(LD) -r $^ -o $@
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$(LD) -r $^ -o $@
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r128_drv.o: r128_drv.c
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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r128.o: $(R128OBJS) $(LIBS)
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$(LD) -r $^ -o $@
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tdfx_drv.o: tdfx_drv.c
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tdfx_drv.o: tdfx_drv.c
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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tdfx.o: $(TDFXOBJS) $(LIBS)
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tdfx.o: $(TDFXOBJS) $(LIBS)
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@ -229,11 +234,6 @@ i810_drv.o: i810_drv.c
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i810.o: $(I810OBJS) $(LIBS)
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i810.o: $(I810OBJS) $(LIBS)
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$(LD) -r $^ -o $@
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$(LD) -r $^ -o $@
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r128_drv.o: r128_drv.c
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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r128.o: $(R128OBJS) $(LIBS)
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$(LD) -r $^ -o $@
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radeon_drv.o: radeon_drv.c
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radeon_drv.o: radeon_drv.c
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
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radeon.o: $(RADEONOBJS) $(LIBS)
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radeon.o: $(RADEONOBJS) $(LIBS)
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@ -254,11 +254,11 @@ ChangeLog:
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$(CC) $(MODCFLAGS) -I$(TREE) -c $< -o $@
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$(CC) $(MODCFLAGS) -I$(TREE) -c $< -o $@
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$(GAMMAOBJS): $(GAMMAHEADERS)
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$(GAMMAOBJS): $(GAMMAHEADERS)
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$(R128OBJS): $(R128HEADERS)
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$(TDFXOBJS): $(TDFXHEADERS)
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$(TDFXOBJS): $(TDFXHEADERS)
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ifeq ($(AGP),1)
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ifeq ($(AGP),1)
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$(MGAOBJS): $(MGAHEADERS)
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$(MGAOBJS): $(MGAHEADERS)
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$(I810OBJS): $(I810HEADERS)
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$(I810OBJS): $(I810HEADERS)
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$(R128OBJS): $(R128HEADERS)
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$(RADEONOBJS): $(RADEONHEADERS)
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$(RADEONOBJS): $(RADEONHEADERS)
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endif
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endif
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@ -144,6 +144,7 @@
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#define DRM_MEM_BOUNDAGP 17
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#define DRM_MEM_BOUNDAGP 17
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#define DRM_MEM_CTXBITMAP 18
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#define DRM_MEM_CTXBITMAP 18
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#define DRM_MEM_STUB 19
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#define DRM_MEM_STUB 19
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#define DRM_MEM_SGLISTS 20
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#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
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#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
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@ -540,7 +541,8 @@ typedef struct drm_device_dma {
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unsigned long *pagelist;
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unsigned long *pagelist;
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unsigned long byte_count;
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unsigned long byte_count;
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enum {
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enum {
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_DRM_DMA_USE_AGP = 0x01
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_DRM_DMA_USE_AGP = 0x01,
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_DRM_DMA_USE_SG = 0x02
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} flags;
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} flags;
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/* DMA support */
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/* DMA support */
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@ -136,7 +136,7 @@ int DRM(addmap)( struct inode *inode, struct file *filp,
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#endif
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#endif
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case _DRM_SCATTER_GATHER:
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case _DRM_SCATTER_GATHER:
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if (!dev->sg) {
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if (!dev->sg) {
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drm_free(map, sizeof(*map), DRM_MEM_MAPS);
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DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
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return -EINVAL;
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return -EINVAL;
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}
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}
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map->offset = map->offset + dev->sg->handle;
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map->offset = map->offset + dev->sg->handle;
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@ -63,6 +63,7 @@ static drm_mem_stats_t DRM(mem_stats)[] = {
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[DRM_MEM_MAPPINGS] = { "mappings" },
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[DRM_MEM_MAPPINGS] = { "mappings" },
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[DRM_MEM_BUFLISTS] = { "buflists" },
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[DRM_MEM_BUFLISTS] = { "buflists" },
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[DRM_MEM_AGPLISTS] = { "agplist" },
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[DRM_MEM_AGPLISTS] = { "agplist" },
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[DRM_MEM_SGLISTS] = { "sglist" },
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[DRM_MEM_TOTALAGP] = { "totalagp" },
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[DRM_MEM_TOTALAGP] = { "totalagp" },
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[DRM_MEM_BOUNDAGP] = { "boundagp" },
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[DRM_MEM_BOUNDAGP] = { "boundagp" },
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[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
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[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
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@ -37,10 +37,11 @@
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/* General customization:
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/* General customization:
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*/
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*/
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#define __HAVE_AGP 1
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#define __HAVE_AGP 1
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#define __MUST_HAVE_AGP 1
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#define __MUST_HAVE_AGP 0
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#define __HAVE_MTRR 1
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#define __HAVE_MTRR 1
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#define __HAVE_CTX_BITMAP 1
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#define __HAVE_CTX_BITMAP 1
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#define __HAVE_SG 1
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#define __HAVE_SG 1
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#define __HAVE_PCI_DMA 1
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/* Driver customization:
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/* Driver customization:
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*/
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*/
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@ -206,9 +206,10 @@ static void r128_do_cce_flush( drm_r128_private_t *dev_priv )
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int r128_do_cce_idle( drm_r128_private_t *dev_priv )
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int r128_do_cce_idle( drm_r128_private_t *dev_priv )
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{
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{
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int i;
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int i;
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drm_r128_ring_buffer_t *ring = &dev_priv->ring;
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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if ( *dev_priv->ring.head == dev_priv->ring.tail ) {
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if ( GET_RING_HEAD(ring) == dev_priv->ring.tail ) {
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int pm4stat = R128_READ( R128_PM4_STAT );
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int pm4stat = R128_READ( R128_PM4_STAT );
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if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >=
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if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >=
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dev_priv->cce_fifo_size ) &&
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dev_priv->cce_fifo_size ) &&
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@ -249,7 +250,7 @@ static void r128_do_cce_reset( drm_r128_private_t *dev_priv )
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{
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{
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R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
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R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
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*dev_priv->ring.head = 0;
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SET_RING_HEAD( &dev_priv->ring, 0 );
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dev_priv->ring.tail = 0;
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dev_priv->ring.tail = 0;
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}
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}
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@ -328,7 +329,7 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev )
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
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/* DL_RPTR_ADDR is a physical address in AGP space. */
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/* DL_RPTR_ADDR is a physical address in AGP space. */
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*dev_priv->ring.head = 0;
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SET_RING_HEAD( &dev_priv->ring, 0 );
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if ( !dev_priv->is_pci ) {
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if ( !dev_priv->is_pci ) {
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR,
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R128_WRITE( R128_PM4_BUFFER_DL_RPTR_ADDR,
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@ -380,7 +381,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
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if ( dev_priv->is_pci && !dev->sg ) {
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if ( dev_priv->is_pci && !dev->sg ) {
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DRM_ERROR( "PCI GART memory not allocated!\n" );
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DRM_ERROR( "PCI GART memory not allocated!\n" );
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drm_free( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
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DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
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dev->dev_private = NULL;
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dev->dev_private = NULL;
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -887,7 +888,7 @@ int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
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int i;
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int i;
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
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ring->space = *ring->head - ring->tail;
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ring->space = GET_RING_HEAD( ring ) - ring->tail;
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if ( ring->space <= 0 )
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if ( ring->space <= 0 )
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ring->space += ring->size;
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ring->space += ring->size;
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@ -906,7 +907,7 @@ void r128_update_ring_snapshot( drm_r128_private_t *dev_priv )
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{
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{
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drm_r128_ring_buffer_t *ring = &dev_priv->ring;
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drm_r128_ring_buffer_t *ring = &dev_priv->ring;
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ring->space = *ring->head - ring->tail;
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ring->space = GET_RING_HEAD( ring ) - ring->tail;
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#if R128_PERFORMANCE_BOXES
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#if R128_PERFORMANCE_BOXES
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if ( ring->space == 0 )
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if ( ring->space == 0 )
|
||||||
atomic_inc( &dev_priv->idle_count );
|
atomic_inc( &dev_priv->idle_count );
|
||||||
|
|
|
||||||
|
|
@ -33,6 +33,7 @@
|
||||||
#include "r128.h"
|
#include "r128.h"
|
||||||
#include "drmP.h"
|
#include "drmP.h"
|
||||||
#include "r128_drv.h"
|
#include "r128_drv.h"
|
||||||
|
#include "ati_pcigart.h"
|
||||||
|
|
||||||
#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
|
#define DRIVER_AUTHOR "Gareth Hughes, VA Linux Systems Inc."
|
||||||
|
|
||||||
|
|
@ -86,5 +87,6 @@
|
||||||
#include "drm_lock.h"
|
#include "drm_lock.h"
|
||||||
#include "drm_memory.h"
|
#include "drm_memory.h"
|
||||||
#include "drm_proc.h"
|
#include "drm_proc.h"
|
||||||
|
#include "drm_scatter.h"
|
||||||
#include "drm_vm.h"
|
#include "drm_vm.h"
|
||||||
#include "drm_stub.h"
|
#include "drm_stub.h"
|
||||||
|
|
|
||||||
|
|
@ -67,6 +67,8 @@ typedef struct drm_r128_private {
|
||||||
|
|
||||||
int usec_timeout;
|
int usec_timeout;
|
||||||
int is_pci;
|
int is_pci;
|
||||||
|
unsigned long phys_pci_gart;
|
||||||
|
unsigned long cce_buffers_offset;
|
||||||
|
|
||||||
atomic_t idle_count;
|
atomic_t idle_count;
|
||||||
|
|
||||||
|
|
@ -241,6 +243,7 @@ extern int r128_cce_indirect( struct inode *inode, struct file *filp,
|
||||||
# define R128_PC_FLUSH_ALL 0x00ff
|
# define R128_PC_FLUSH_ALL 0x00ff
|
||||||
# define R128_PC_BUSY (1 << 31)
|
# define R128_PC_BUSY (1 << 31)
|
||||||
|
|
||||||
|
#define R128_PCI_GART_PAGE 0x017c
|
||||||
#define R128_PRIM_TEX_CNTL_C 0x1cb0
|
#define R128_PRIM_TEX_CNTL_C 0x1cb0
|
||||||
|
|
||||||
#define R128_SCALE_3D_CNTL 0x1a00
|
#define R128_SCALE_3D_CNTL 0x1a00
|
||||||
|
|
@ -370,8 +373,8 @@ extern int r128_cce_indirect( struct inode *inode, struct file *filp,
|
||||||
#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
|
#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
|
||||||
|
|
||||||
#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg )
|
#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg )
|
||||||
#define R128_READ(reg) R128_DEREF( reg )
|
#define R128_READ(reg) le32_to_cpu( R128_DEREF( reg ) )
|
||||||
#define R128_WRITE(reg,val) do { R128_DEREF( reg ) = val; } while (0)
|
#define R128_WRITE(reg,val) do { R128_DEREF( reg ) = cpu_to_le32( val ); } while (0)
|
||||||
|
|
||||||
#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg )
|
#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg )
|
||||||
#define R128_READ8(reg) R128_DEREF8( reg )
|
#define R128_READ8(reg) R128_DEREF8( reg )
|
||||||
|
|
@ -400,6 +403,10 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
|
||||||
* Misc helper macros
|
* Misc helper macros
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#define GET_RING_HEAD(ring) le32_to_cpu( *(ring)->head )
|
||||||
|
#define SET_RING_HEAD(ring,x) *(ring)->head = cpu_to_le32( x )
|
||||||
|
|
||||||
|
|
||||||
#define LOCK_TEST_WITH_RETURN( dev ) \
|
#define LOCK_TEST_WITH_RETURN( dev ) \
|
||||||
do { \
|
do { \
|
||||||
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
|
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
|
||||||
|
|
@ -415,7 +422,7 @@ do { \
|
||||||
drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
|
drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
|
||||||
if ( ring->space < ring->high_mark ) { \
|
if ( ring->space < ring->high_mark ) { \
|
||||||
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
|
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
|
||||||
ring->space = *ring->head - ring->tail; \
|
ring->space = GET_RING_HEAD(ring) - ring->tail; \
|
||||||
if ( ring->space <= 0 ) \
|
if ( ring->space <= 0 ) \
|
||||||
ring->space += ring->size; \
|
ring->space += ring->size; \
|
||||||
if ( ring->space >= ring->high_mark ) \
|
if ( ring->space >= ring->high_mark ) \
|
||||||
|
|
@ -498,7 +505,7 @@ do { \
|
||||||
DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
|
DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
|
||||||
(unsigned int)(x), write ); \
|
(unsigned int)(x), write ); \
|
||||||
} \
|
} \
|
||||||
ring[write++] = (x); \
|
ring[write++] = cpu_to_le32( x ); \
|
||||||
write &= tail_mask; \
|
write &= tail_mask; \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -670,7 +670,7 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
|
||||||
u32 *data = (u32 *)
|
u32 *data = (u32 *)
|
||||||
((char *)dev_priv->buffers->handle
|
((char *)dev_priv->buffers->handle
|
||||||
+ buf->offset + start);
|
+ buf->offset + start);
|
||||||
data[dwords++] = R128_CCE_PACKET2;
|
data[dwords++] = cpu_to_le32( R128_CCE_PACKET2 );
|
||||||
}
|
}
|
||||||
|
|
||||||
buf_priv->dispatched = 1;
|
buf_priv->dispatched = 1;
|
||||||
|
|
@ -739,16 +739,16 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
|
||||||
data = (u32 *)((char *)dev_priv->buffers->handle
|
data = (u32 *)((char *)dev_priv->buffers->handle
|
||||||
+ buf->offset + start);
|
+ buf->offset + start);
|
||||||
|
|
||||||
data[0] = CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, dwords-2 );
|
data[0] = cpu_to_le32( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, dwords-2 ) );
|
||||||
|
|
||||||
data[1] = offset;
|
data[1] = cpu_to_le32( offset );
|
||||||
data[2] = R128_MAX_VB_VERTS;
|
data[2] = cpu_to_le32( R128_MAX_VB_VERTS );
|
||||||
data[3] = format;
|
data[3] = cpu_to_le32( format );
|
||||||
data[4] = (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
|
data[4] = cpu_to_le32( (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
|
||||||
(count << 16));
|
(count << 16)) );
|
||||||
|
|
||||||
if ( count & 0x1 ) {
|
if ( count & 0x1 ) {
|
||||||
data[dwords-1] &= 0x0000ffff;
|
data[dwords-1] &= cpu_to_le32( 0x0000ffff );
|
||||||
}
|
}
|
||||||
|
|
||||||
do {
|
do {
|
||||||
|
|
@ -856,8 +856,8 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
|
||||||
|
|
||||||
data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
|
data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
|
||||||
|
|
||||||
data[0] = CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 );
|
data[0] = cpu_to_le32( CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 ) );
|
||||||
data[1] = (R128_GMC_DST_PITCH_OFFSET_CNTL |
|
data[1] = cpu_to_le32( (R128_GMC_DST_PITCH_OFFSET_CNTL |
|
||||||
R128_GMC_BRUSH_NONE |
|
R128_GMC_BRUSH_NONE |
|
||||||
(blit->format << 8) |
|
(blit->format << 8) |
|
||||||
R128_GMC_SRC_DATATYPE_COLOR |
|
R128_GMC_SRC_DATATYPE_COLOR |
|
||||||
|
|
@ -865,14 +865,14 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
|
||||||
R128_DP_SRC_SOURCE_HOST_DATA |
|
R128_DP_SRC_SOURCE_HOST_DATA |
|
||||||
R128_GMC_CLR_CMP_CNTL_DIS |
|
R128_GMC_CLR_CMP_CNTL_DIS |
|
||||||
R128_GMC_AUX_CLIP_DIS |
|
R128_GMC_AUX_CLIP_DIS |
|
||||||
R128_GMC_WR_MSK_DIS);
|
R128_GMC_WR_MSK_DIS) );
|
||||||
|
|
||||||
data[2] = (blit->pitch << 21) | (blit->offset >> 5);
|
data[2] = cpu_to_le32( (blit->pitch << 21) | (blit->offset >> 5) );
|
||||||
data[3] = 0xffffffff;
|
data[3] = 0xffffffff;
|
||||||
data[4] = 0xffffffff;
|
data[4] = 0xffffffff;
|
||||||
data[5] = (blit->y << 16) | blit->x;
|
data[5] = cpu_to_le32( (blit->y << 16) | blit->x );
|
||||||
data[6] = (blit->height << 16) | blit->width;
|
data[6] = cpu_to_le32( (blit->height << 16) | blit->width );
|
||||||
data[7] = dwords;
|
data[7] = cpu_to_le32( dwords );
|
||||||
|
|
||||||
buf->used = (dwords + 8) * sizeof(u32);
|
buf->used = (dwords + 8) * sizeof(u32);
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue