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nouveau: give nv03 the last cut.

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This commit is contained in:
Stephane Marchesin 2007-08-30 21:51:53 +02:00
parent c78e610fa4
commit 69b11f44f0
6 changed files with 0 additions and 28 deletions
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7
shared-core/drm_pciids.txt
View file

@ -482,9 +482,6 @@
0x10DE 0x009E NV40 "NVidia 0x009E" 0x10DE 0x009E NV40 "NVidia 0x009E"
[nouveau] [nouveau]
0x10de 0x0008 NV_03 "EDGE 3D"
0x10de 0x0009 NV_03 "EDGE 3D"
0x10de 0x0010 NV_03 "Mutara V08"
0x10de 0x0020 NV_04 "RIVA TNT" 0x10de 0x0020 NV_04 "RIVA TNT"
0x10de 0x0028 NV_04 "RIVA TNT2/TNT2 Pro" 0x10de 0x0028 NV_04 "RIVA TNT2/TNT2 Pro"
0x10de 0x0029 NV_04 "RIVA TNT2 Ultra" 0x10de 0x0029 NV_04 "RIVA TNT2 Ultra"
@ -732,10 +729,6 @@
0x10de 0x0421 NV_50 "GeForce 8500 GT" 0x10de 0x0421 NV_50 "GeForce 8500 GT"
0x10de 0x0422 NV_50 "GeForce 8400 GS" 0x10de 0x0422 NV_50 "GeForce 8400 GS"
0x10de 0x0423 NV_50 "GeForce 8300 GS" 0x10de 0x0423 NV_50 "GeForce 8300 GS"
0x12d2 0x0008 NV_03 "NV1"
0x12d2 0x0009 NV_03 "DAC64"
0x12d2 0x0018 NV_03 "Riva128"
0x12d2 0x0019 NV_03 "Riva128ZX"
0x12d2 0x0020 NV_04 "TNT" 0x12d2 0x0020 NV_04 "TNT"
0x12d2 0x0028 NV_04 "TNT2" 0x12d2 0x0028 NV_04 "TNT2"
0x12d2 0x0029 NV_04 "UTNT2" 0x12d2 0x0029 NV_04 "UTNT2"

2
shared-core/nouveau_drm.h
View file

@ -119,8 +119,6 @@ struct drm_nouveau_setparam {
enum nouveau_card_type { enum nouveau_card_type {
NV_UNKNOWN =0, NV_UNKNOWN =0,
NV_01 =1,
NV_03 =3,
NV_04 =4, NV_04 =4,
NV_05 =5, NV_05 =5,
NV_10 =10, NV_10 =10,

3
shared-core/nouveau_fifo.c
View file

@ -34,8 +34,6 @@ int nouveau_fifo_number(struct drm_device *dev)
struct drm_nouveau_private *dev_priv=dev->dev_private; struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type) switch(dev_priv->card_type)
{ {
case NV_03:
return 8;
case NV_04: case NV_04:
case NV_05: case NV_05:
return 16; return 16;
@ -109,7 +107,6 @@ static int nouveau_fifo_instmem_configure(struct drm_device *dev)
case NV_11: case NV_11:
case NV_10: case NV_10:
case NV_04: case NV_04:
case NV_03:
NV_WRITE(NV03_PFIFO_RAMFC, dev_priv->ramfc_offset>>8); NV_WRITE(NV03_PFIFO_RAMFC, dev_priv->ramfc_offset>>8);
break; break;
} }

12
shared-core/nouveau_mem.c
View file

@ -257,18 +257,6 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev)
struct drm_nouveau_private *dev_priv=dev->dev_private; struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type) switch(dev_priv->card_type)
{ {
case NV_03:
switch(NV_READ(NV03_BOOT_0)&NV03_BOOT_0_RAM_AMOUNT)
{
case NV03_BOOT_0_RAM_AMOUNT_8MB:
case NV03_BOOT_0_RAM_AMOUNT_8MB_SDRAM:
return 8*1024*1024;
case NV03_BOOT_0_RAM_AMOUNT_4MB:
return 4*1024*1024;
case NV03_BOOT_0_RAM_AMOUNT_2MB:
return 2*1024*1024;
}
break;
case NV_04: case NV_04:
case NV_05: case NV_05:
if (NV_READ(NV03_BOOT_0) & 0x00000100) { if (NV_READ(NV03_BOOT_0) & 0x00000100) {

3
shared-core/nouveau_state.c
View file

@ -538,9 +538,6 @@ void nouveau_wait_for_idle(struct drm_device *dev)
{ {
struct drm_nouveau_private *dev_priv=dev->dev_private; struct drm_nouveau_private *dev_priv=dev->dev_private;
switch(dev_priv->card_type) { switch(dev_priv->card_type) {
case NV_03:
while (NV_READ(NV03_PGRAPH_STATUS));
break;
case NV_50: case NV_50:
break; break;
default: { default: {

1
shared-core/nv04_instmem.c
View file

@ -70,7 +70,6 @@ nv04_instmem_configure_fixed_tables(struct drm_device *dev)
case NV_11: case NV_11:
case NV_10: case NV_10:
case NV_04: case NV_04:
case NV_03:
default: default:
dev_priv->ramfc_offset = 0x11400; dev_priv->ramfc_offset = 0x11400;
dev_priv->ramfc_size = nouveau_fifo_number(dev) * dev_priv->ramfc_size = nouveau_fifo_number(dev) *