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Right, I've had it. Interrupts are gone...

Browse source 
This commit will temporarily break the gamma driver. I'll fix it up
    tonight.
This commit is contained in:
Gareth Hughes 2001-02-12 10:45:03 +00:00
parent b381e69d45
commit 6038ace5dc
11 changed files with 357 additions and 1399 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
linux-core/drm_dma.c
View file

@ -114,6 +114,7 @@ void DRM(dma_takedown)(drm_device_t *dev)
dev->dma = NULL;
}
#if DRM_DMA_HISTOGRAM
/* This is slow, but is useful for debugging. */
int DRM(histogram_slot)(unsigned long count)
@ -220,6 +221,8 @@ void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
}
}
#if __HAVE_OLD_DMA
#if 0
int drm_context_switch(drm_device_t *dev, int old, int new)
{
@ -562,3 +565,5 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
}
#endif
#endif

79
linux-core/drm_drv.c
View file

@ -75,8 +75,8 @@
#ifndef __HAVE_DMA_QUIESCENT
#define __HAVE_DMA_QUIESCENT 0
#endif
#ifndef __HAVE_DRIVER_RELEASE
#define __HAVE_DRIVER_RELEASE 0
#ifndef __HAVE_RELEASE
#define __HAVE_RELEASE 0
#endif
#ifndef __HAVE_COUNTERS
#define __HAVE_COUNTERS 0
@ -91,6 +91,9 @@
#ifndef DRIVER_PRETAKEDOWN
#define DRIVER_PRETAKEDOWN()
#endif
#ifndef DRIVER_IOCTLS
#define DRIVER_IOCTLS
#endif
static drm_device_t DRM(device);
@ -111,6 +114,68 @@ static struct file_operations DRM(fops) = {
poll: DRM(poll),
};
static drm_ioctl_desc_t DRM(ioctls)[] = {
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_busid), 0, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(block), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(unblock), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(finish), 1, 0 },
#if __HAVE_DMA
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 },
/* The DRM_IOCTL_DMA ioctl should be defined by the driver.
*/
#if __HAVE_DMA_IRQ
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 },
#endif
#endif
#if __REALLY_HAVE_AGP
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
#endif
DRIVER_IOCTLS
};
#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) )
#ifdef MODULE
static char *drm_opts = NULL;
#endif
@ -186,7 +251,7 @@ static int DRM(setup)( drm_device_t *dev )
#ifdef __HAVE_COUNTER15
dev->types[14] = __HAVE_COUNTER14;
#endif
for (i = 0; i < DRM_ARRAY_SIZE(dev->counts); i++)
atomic_set(&dev->counts[i], 0);
@ -463,8 +528,7 @@ static void __exit drm_cleanup( void )
DRM(ctxbitmap_cleanup)( dev );
#endif
#if __REALLY_HAVE_MTRR
#if __REALLY_HAVE_AGP
#if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
if ( dev->agp && dev->agp->agp_mtrr ) {
int retval;
retval = mtrr_del( dev->agp->agp_mtrr,
@ -472,7 +536,6 @@ static void __exit drm_cleanup( void )
dev->agp->agp_info.aper_size*1024*1024 );
DRM_DEBUG( "mtrr_del=%d\n", retval );
}
#endif
#endif
DRM(takedown)( dev );
@ -573,7 +636,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
DRM_ERROR( "Process %d dead, freeing lock for context %d\n",
current->pid,
_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
#if __HAVE_DRIVER_RELEASE
#if __HAVE_RELEASE
DRIVER_RELEASE();
#endif
DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
@ -584,7 +647,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
processed via a callback to the X
server. */
}
#if __HAVE_DRIVER_RELEASE
#if __HAVE_RELEASE
else if ( dev->lock.hw_lock ) {
/* The lock is required to reclaim buffers */
DECLARE_WAITQUEUE( entry, current );

84
linux-core/mga_drv.c
View file

@ -38,85 +38,23 @@
#define DRIVER_NAME "mga"
#define DRIVER_DESC "Matrox G200/G400"
#define DRIVER_DATE "20010206"
#define DRIVER_DATE "20010212"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
#define DRIVER_PATCHLEVEL 0
/* Now that we do this, we can move the DRM(ioctls) array into a
* template file and have a DRIVER_IOCTLS block at the end.
*/
static drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { mga_version, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { mga_getunique, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { mga_getmagic, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { mga_irq_busid, 0, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { mga_getmap, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { mga_getclient, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { mga_getstats, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { mga_setunique, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { mga_block, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { mga_unblock, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { mga_control, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { mga_authmagic, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { mga_addmap, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { mga_addbufs, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { mga_markbufs, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { mga_infobufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { mga_mapbufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { mga_freebufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { mga_addctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { mga_rmctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { mga_modctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { mga_getctx, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { mga_switchctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { mga_newctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { mga_resctx, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { mga_adddraw, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { mga_rmdraw, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { mga_lock, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { mga_unlock, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { mga_finish, 1, 0 },
#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { mga_agp_acquire, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { mga_agp_release, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { mga_agp_enable, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { mga_agp_info, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { mga_agp_alloc, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { mga_agp_free, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { mga_agp_bind, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { mga_agp_unbind, 1, 1 },
#endif
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
#define DRIVER_IOCTLS \
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
#if 0
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
#endif
};
#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls )
#define __HAVE_AGP 1
#define __MUST_HAVE_AGP 1
#define __HAVE_MTRR 1
#define __HAVE_CTX_BITMAP 1
#define __HAVE_DMA 1
#define __HAVE_DMA_IRQ 1
#define __HAVE_COUNTERS 3
@ -137,7 +75,7 @@ do { \
} while (0)
#if 0
#define __HAVE_DRIVER_RELEASE 1
#define __HAVE_RELEASE 1
#define DRIVER_RELEASE() do { \
mga_reclaim_buffers( dev, priv->pid ); \
if ( dev->dev_private ) { \

4
linux/Makefile.linux
View file

@ -136,7 +136,7 @@ endif
ifeq ($(AGP),1)
MODCFLAGS += -DCONFIG_AGP -DCONFIG_AGP_MODULE
#DRMOBJS += agpsupport.o
MODS += mga.o gamma.o
MODS += mga.o
#ifeq ($(MACHINE),i386)
#MODS += i810.o
#endif
@ -211,7 +211,7 @@ dristat: dristat.c
gamma_drv.o: gamma_drv.c
$(CC) $(MODCFLAGS) -DEXPORT_SYMTAB -I$(TREE) -c $< -o $@
gamma.o: $(GAMMAOBJS)
gamma.o: $(GAMMAOBJS)
$(LD) -r $^ -o $@
tdfx_drv.o: tdfx_drv.c

5
linux/drm_dma.h
View file

@ -114,6 +114,7 @@ void DRM(dma_takedown)(drm_device_t *dev)
dev->dma = NULL;
}
#if DRM_DMA_HISTOGRAM
/* This is slow, but is useful for debugging. */
int DRM(histogram_slot)(unsigned long count)
@ -220,6 +221,8 @@ void DRM(reclaim_buffers)(drm_device_t *dev, pid_t pid)
}
}
#if __HAVE_OLD_DMA
#if 0
int drm_context_switch(drm_device_t *dev, int old, int new)
{
@ -562,3 +565,5 @@ int DRM(dma_get_buffers)(drm_device_t *dev, drm_dma_t *dma)
}
#endif
#endif

79
linux/drm_drv.h
View file

@ -75,8 +75,8 @@
#ifndef __HAVE_DMA_QUIESCENT
#define __HAVE_DMA_QUIESCENT 0
#endif
#ifndef __HAVE_DRIVER_RELEASE
#define __HAVE_DRIVER_RELEASE 0
#ifndef __HAVE_RELEASE
#define __HAVE_RELEASE 0
#endif
#ifndef __HAVE_COUNTERS
#define __HAVE_COUNTERS 0
@ -91,6 +91,9 @@
#ifndef DRIVER_PRETAKEDOWN
#define DRIVER_PRETAKEDOWN()
#endif
#ifndef DRIVER_IOCTLS
#define DRIVER_IOCTLS
#endif
static drm_device_t DRM(device);
@ -111,6 +114,68 @@ static struct file_operations DRM(fops) = {
poll: DRM(poll),
};
static drm_ioctl_desc_t DRM(ioctls)[] = {
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { DRM(version), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { DRM(getunique), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { DRM(getmagic), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { DRM(irq_busid), 0, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { DRM(getmap), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { DRM(getclient), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { DRM(getstats), 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { DRM(setunique), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { DRM(block), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { DRM(unblock), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { DRM(authmagic), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { DRM(addmap), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { DRM(addctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { DRM(rmctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { DRM(modctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { DRM(getctx), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { DRM(switchctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { DRM(newctx), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { DRM(resctx), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { DRM(adddraw), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { DRM(rmdraw), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { DRM(lock), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { DRM(unlock), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { DRM(finish), 1, 0 },
#if __HAVE_DMA
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { DRM(addbufs), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { DRM(markbufs), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { DRM(infobufs), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { DRM(mapbufs), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { DRM(freebufs), 1, 0 },
/* The DRM_IOCTL_DMA ioctl should be defined by the driver.
*/
#if __HAVE_DMA_IRQ
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { DRM(control), 1, 1 },
#endif
#endif
#if __REALLY_HAVE_AGP
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { DRM(agp_acquire), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { DRM(agp_release), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { DRM(agp_enable), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { DRM(agp_info), 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { DRM(agp_alloc), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { DRM(agp_free), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { DRM(agp_bind), 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { DRM(agp_unbind), 1, 1 },
#endif
DRIVER_IOCTLS
};
#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( DRM(ioctls) )
#ifdef MODULE
static char *drm_opts = NULL;
#endif
@ -186,7 +251,7 @@ static int DRM(setup)( drm_device_t *dev )
#ifdef __HAVE_COUNTER15
dev->types[14] = __HAVE_COUNTER14;
#endif
for (i = 0; i < DRM_ARRAY_SIZE(dev->counts); i++)
atomic_set(&dev->counts[i], 0);
@ -463,8 +528,7 @@ static void __exit drm_cleanup( void )
DRM(ctxbitmap_cleanup)( dev );
#endif
#if __REALLY_HAVE_MTRR
#if __REALLY_HAVE_AGP
#if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
if ( dev->agp && dev->agp->agp_mtrr ) {
int retval;
retval = mtrr_del( dev->agp->agp_mtrr,
@ -472,7 +536,6 @@ static void __exit drm_cleanup( void )
dev->agp->agp_info.aper_size*1024*1024 );
DRM_DEBUG( "mtrr_del=%d\n", retval );
}
#endif
#endif
DRM(takedown)( dev );
@ -573,7 +636,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
DRM_ERROR( "Process %d dead, freeing lock for context %d\n",
current->pid,
_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) );
#if __HAVE_DRIVER_RELEASE
#if __HAVE_RELEASE
DRIVER_RELEASE();
#endif
DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
@ -584,7 +647,7 @@ int DRM(release)( struct inode *inode, struct file *filp )
processed via a callback to the X
server. */
}
#if __HAVE_DRIVER_RELEASE
#if __HAVE_RELEASE
else if ( dev->lock.hw_lock ) {
/* The lock is required to reclaim buffers */
DECLARE_WAITQUEUE( entry, current );

1
linux/mga.h
View file

@ -42,6 +42,5 @@
#define __HAVE_CTX_BITMAP 1
#define __HAVE_DMA 1
#define __HAVE_DMA_IRQ 1
#endif

1110
linux/mga_dma.c
View file

File diff suppressed because it is too large Load diff

84
linux/mga_drv.c
View file

@ -38,85 +38,23 @@
#define DRIVER_NAME "mga"
#define DRIVER_DESC "Matrox G200/G400"
#define DRIVER_DATE "20010206"
#define DRIVER_DATE "20010212"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
#define DRIVER_PATCHLEVEL 0
/* Now that we do this, we can move the DRM(ioctls) array into a
* template file and have a DRIVER_IOCTLS block at the end.
*/
static drm_ioctl_desc_t mga_ioctls[] = {
[DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { mga_version, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { mga_getunique, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { mga_getmagic, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { mga_irq_busid, 0, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)] = { mga_getmap, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)] = { mga_getclient, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)] = { mga_getstats, 0, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { mga_setunique, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { mga_block, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { mga_unblock, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)] = { mga_control, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { mga_authmagic, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { mga_addmap, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { mga_addbufs, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { mga_markbufs, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { mga_infobufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { mga_mapbufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { mga_freebufs, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { mga_addctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { mga_rmctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { mga_modctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { mga_getctx, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { mga_switchctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { mga_newctx, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { mga_resctx, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { mga_adddraw, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { mga_rmdraw, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { mga_lock, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { mga_unlock, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { mga_finish, 1, 0 },
#if defined(CONFIG_AGP) || defined(CONFIG_AGP_MODULE)
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { mga_agp_acquire, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { mga_agp_release, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { mga_agp_enable, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { mga_agp_info, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { mga_agp_alloc, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { mga_agp_free, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { mga_agp_bind, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { mga_agp_unbind, 1, 1 },
#endif
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 },
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 },
#define DRIVER_IOCTLS \
[DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { mga_dma_buffers, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_dma_flush, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)] = { mga_dma_reset, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_dma_swap, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_dma_clear, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_dma_vertex, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_dma_iload, 1, 0 },
#if 0
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
#endif
};
#define DRIVER_IOCTL_COUNT DRM_ARRAY_SIZE( mga_ioctls )
#define __HAVE_AGP 1
#define __MUST_HAVE_AGP 1
#define __HAVE_MTRR 1
#define __HAVE_CTX_BITMAP 1
#define __HAVE_DMA 1
#define __HAVE_DMA_IRQ 1
#define __HAVE_COUNTERS 3
@ -137,7 +75,7 @@ do { \
} while (0)
#if 0
#define __HAVE_DRIVER_RELEASE 1
#define __HAVE_RELEASE 1
#define DRIVER_RELEASE() do { \
mga_reclaim_buffers( dev, priv->pid ); \
if ( dev->dev_private ) { \

150
linux/mga_drv.h
View file

@ -64,13 +64,15 @@ typedef struct drm_mga_primary_buffer {
u32 tail;
int space;
unsigned long status_page;
volatile u32 *status;
u32 last_flush;
u32 last_wrap;
__volatile__ long wrap_flag;
u32 high_mark;
spinlock_t tail_lock;
spinlock_t flush_lock;
spinlock_t list_lock;
} drm_mga_primary_buffer_t;
@ -173,20 +175,11 @@ extern int mga_dma_swap( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_dma_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_dma_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_dma_iload( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
#if 0
extern int mga_clear_bufs( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_swap_bufs( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_iload( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int mga_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
#endif
/* mga_warp.c */
extern int mga_warp_install_microcode( drm_device_t *dev );
extern int mga_warp_init( drm_device_t *dev );
@ -201,13 +194,6 @@ extern int mga_warp_init( drm_device_t *dev );
#define MGA_READ( reg ) MGA_DEREF( reg )
#define MGA_WRITE( reg, val ) do { MGA_DEREF( reg ) = val; } while (0)
typedef enum {
TT_GENERAL,
TT_BLIT,
TT_VECTOR,
TT_VERTEX
} transferType_t;
#define DWGREG0 0x1c00
#define DWGREG0_END 0x1dff
@ -219,104 +205,6 @@ typedef enum {
#define DMAREG1(r) (u8)(((r - DWGREG1) >> 2) | 0x80)
#define DMAREG(r) (ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
#define MGA_NUM_PRIM_BUFS 8
#define PRIMLOCALS u8 tempIndex[4]; u32 *dma_ptr; u32 phys_head; \
int outcount, num_dwords
#define PRIM_OVERFLOW(dev, dev_priv, length) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
if( test_bit(MGA_BUF_NEEDS_OVERFLOW, &tmp_buf->buffer_status)) { \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
} else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length || \
tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \
set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \
mga_advance_primary(dev); \
mga_dma_schedule(dev, 1); \
tmp_buf = dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
} \
if(MGA_VERBOSE) \
DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
dma_ptr = tmp_buf->current_dma_ptr; \
num_dwords = tmp_buf->num_dwords; \
phys_head = tmp_buf->phys_head; \
outcount = 0; \
} while(0)
#define PRIMGETPTR(dev_priv) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
if(MGA_VERBOSE) \
DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \
dma_ptr = tmp_buf->current_dma_ptr; \
num_dwords = tmp_buf->num_dwords; \
phys_head = tmp_buf->phys_head; \
outcount = 0; \
} while(0)
#define PRIMPTR(prim_buf) do { \
if(MGA_VERBOSE) \
DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__); \
dma_ptr = prim_buf->current_dma_ptr; \
num_dwords = prim_buf->num_dwords; \
phys_head = prim_buf->phys_head; \
outcount = 0; \
} while(0)
#define PRIMFINISH(prim_buf) do { \
if (MGA_VERBOSE) { \
DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__); \
if (outcount & 3) \
DRM_DEBUG(" --- truncation\n"); \
} \
prim_buf->num_dwords = num_dwords; \
prim_buf->current_dma_ptr = dma_ptr; \
} while(0)
#define PRIMADVANCE(dev_priv) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
if (MGA_VERBOSE) { \
DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__); \
if (outcount & 3) \
DRM_DEBUG(" --- truncation\n"); \
} \
tmp_buf->num_dwords = num_dwords; \
tmp_buf->current_dma_ptr = dma_ptr; \
} while (0)
#define PRIMUPDATE(dev_priv) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
tmp_buf->sec_used++; \
} while (0)
#define AGEBUF(dev_priv, buf_priv) do { \
drm_mga_prim_buf_t *tmp_buf = \
dev_priv->prim_bufs[dev_priv->current_prim_idx]; \
buf_priv->my_freelist->age = tmp_buf->prim_age; \
} while (0)
#define PRIMOUTREG(reg, val) do { \
tempIndex[outcount]=ADRINDEX(reg); \
dma_ptr[1+outcount] = val; \
if (MGA_VERBOSE) \
DRM_DEBUG(" PRIMOUT %d: 0x%x -- 0x%x\n", \
num_dwords + 1 + outcount, ADRINDEX(reg), val); \
if( ++outcount == 4) { \
outcount = 0; \
dma_ptr[0] = *(unsigned long *)tempIndex; \
dma_ptr+=5; \
num_dwords += 5; \
} \
}while (0)
/* ================================================================
@ -349,10 +237,10 @@ do { \
* Primary DMA command stream
*/
#define MGA_VERBOSE 0
#define MGA_VERBOSE ( 0 /*dev_priv->prim.space < 0x100*/ )
#define DMA_LOCALS unsigned int write; volatile u8 *prim;
#define DMA_LOCALS unsigned int write; volatile u8 *prim; \
unsigned long flags;
#define DMA_BLOCK_SIZE (5 * sizeof(u32))
#define BEGIN_DMA( n ) \
@ -363,7 +251,8 @@ do { \
DRM_INFO( " space=0x%x req=0x%x\n", \
dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \
} \
if ( dev_priv->prim.space < (int)((n) * DMA_BLOCK_SIZE) ) { \
if ( dev_priv->prim.space < (int)((n) * DMA_BLOCK_SIZE + \
MGA_DMA_SOFTRAP_SIZE) ) { \
mga_do_dma_wrap( dev_priv ); \
} \
prim = dev_priv->prim.start; \
@ -382,16 +271,27 @@ do { \
#define ADVANCE_DMA() \
do { \
dev_priv->prim.space -= (write - dev_priv->prim.tail); \
spin_lock_irqsave( &dev_priv->prim.tail_lock, flags ); \
dev_priv->prim.tail = write; \
spin_unlock_irqrestore( &dev_priv->prim.tail_lock, flags ); \
if ( MGA_VERBOSE ) { \
DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
write, dev_priv->prim.space ); \
} \
} while (0)
#if 0
#define FLUSH_DMA() \
do { \
if ( dev_priv->prim.space < (int)(128 * DMA_BLOCK_SIZE + \
MGA_DMA_SOFTRAP_SIZE) ) { \
mga_do_dma_wrap( dev_priv ); \
} else { \
mga_do_dma_flush( dev_priv ); \
} \
} while (0)
#else
#define FLUSH_DMA() mga_do_dma_flush( dev_priv );
#endif
/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
*/
#define DMA_WRITE( offset, val ) \

155
linux/mga_state.c
View file

@ -598,7 +598,7 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
ADVANCE_DMA();
#endif
mga_do_dma_flush( dev_priv );
FLUSH_DMA();
}
static void mga_dma_dispatch_swap( drm_device_t *dev )
@ -611,7 +611,8 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
u32 pitch = dev_priv->front_pitch / dev_priv->fb_cpp;
int i;
DMA_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s:\n", __FUNCTION__ );
DRM_DEBUG( " head = 0x%06x\n", *dev_priv->prim.head );
BEGIN_DMA( 2 + nbox );
@ -645,7 +646,13 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
ADVANCE_DMA();
mga_do_dma_flush( dev_priv );
sarea_priv->last_frame.head = dev_priv->prim.tail;
sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
DRM_DEBUG( " tail = 0x%06x\n", dev_priv->prim.tail );
DRM_DEBUG( " wrap = 0x%06x\n", dev_priv->prim.last_wrap );
FLUSH_DMA();
}
static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
@ -695,66 +702,57 @@ static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
mga_freelist_put( dev, buf );
}
mga_do_dma_flush( dev_priv );
FLUSH_DMA();
}
#if 0
static void mga_dma_dispatch_indices(drm_device_t * dev,
drm_buf_t * buf,
unsigned int start, unsigned int end)
static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
unsigned int start, unsigned int end )
{
drm_mga_private_t *dev_priv = dev->dev_private;
drm_mga_buf_priv_t *buf_priv = buf->dev_private;
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int address = (unsigned int) buf->bus_address;
int use_agp = PDEA_pagpxfer_enable;
u32 address = (u32) buf->bus_address;
int i = 0;
PRIMLOCALS;
DMA_LOCALS;
DRM_INFO( __FUNCTION__ ": buf=%d start=%d end=%d\n",
buf->idx, start, end );
if (start != end) {
/* WARNING: if you change any of the state functions verify
* these numbers (Overestimating this doesn't hurt).
*/
if ( start != end ) {
buf_priv->dispatched = 1;
PRIM_OVERFLOW(dev, dev_priv,
(MAX_STATE_SIZE + (5 * MGA_NR_SAREA_CLIPRECTS)));
mgaEmitState(dev_priv);
MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
do {
if (i < sarea_priv->nbox) {
mgaEmitClipRect(dev_priv,
&sarea_priv->boxes[i]);
if ( i < sarea_priv->nbox ) {
mga_emit_clip_rect( dev_priv,
&sarea_priv->boxes[i] );
}
PRIMGETPTR(dev_priv);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_DMAPAD, 0);
PRIMOUTREG(MGAREG_SETUPADDRESS,
((address + start) |
SETADD_mode_vertlist));
PRIMOUTREG(MGAREG_SETUPEND,
((address + end) | use_agp));
/* ((address + start + 12) | use_agp)); */
PRIMADVANCE(dev_priv);
} while (++i < sarea_priv->nbox);
BEGIN_DMA( 1 );
DMA_BLOCK( MGA_DMAPAD, 0x00000000,
MGA_DMAPAD, 0x00000000,
MGA_SETUPADDRESS, address + start,
MGA_SETUPEND, ((address + end) |
MGA_PAGPXFER) );
ADVANCE_DMA();
} while ( ++i < sarea_priv->nbox );
}
if (buf_priv->discard) {
if (buf_priv->dispatched == 1)
AGEBUF(dev_priv, buf_priv);
if ( buf_priv->discard ) {
if ( buf_priv->dispatched == 1 )
AGE_BUFFER( buf_priv );
buf->pending = 0;
buf->used = 0;
buf_priv->dispatched = 0;
mga_freelist_put(dev, buf);
mga_freelist_put( dev, buf );
}
FLUSH_DMA();
}
#endif
/* This copies a 64 byte aligned agp region to the frambuffer with a
* standard blit, the ioctl needs to do checking.
*/
@ -767,6 +765,9 @@ static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
u32 y2;
DMA_LOCALS;
DRM_DEBUG( "%s: buf=%d used=%d\n",
__FUNCTION__, buf->idx, buf->used );
y2 = length / 64;
BEGIN_DMA( 4 );
@ -793,11 +794,12 @@ static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
ADVANCE_DMA();
#if 0
AGE_BUFFER( buf_priv );
#endif
buf_priv->discard = 1;
mga_freelist_put( dev, buf );
FLUSH_DMA();
}
@ -871,12 +873,6 @@ int mga_dma_vertex( struct inode *inode, struct file *filp,
(drm_mga_vertex_t *)arg,
sizeof(vertex) ) )
return -EFAULT;
#if 0
/* HACK: oh well...
*/
if ( mga_do_wait_for_idle( dev_priv ) < 0 )
return -EBUSY;
#endif
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
@ -886,10 +882,8 @@ int mga_dma_vertex( struct inode *inode, struct file *filp,
if ( !mga_verify_state( dev_priv ) ) {
if ( vertex.discard ) {
#if 0
if ( buf_priv->dispatched == 1 )
AGEBUF(dev_priv, buf_priv);
#endif
AGE_BUFFER( buf_priv );
buf_priv->dispatched = 0;
mga_freelist_put( dev, buf );
}
@ -901,59 +895,45 @@ int mga_dma_vertex( struct inode *inode, struct file *filp,
return 0;
}
#if 0
int mga_indices(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg)
int mga_dma_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
drm_mga_private_t *dev_priv =
(drm_mga_private_t *) dev->dev_private;
drm_mga_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
drm_mga_buf_priv_t *buf_priv;
drm_mga_indices_t indices;
DRM_INFO( __FUNCTION__ "\n" );
if (copy_from_user(&indices,
(drm_mga_indices_t *)arg, sizeof(indices)))
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &indices,
(drm_mga_indices_t *)arg,
sizeof(indices) ) )
return -EFAULT;
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
DRM_ERROR("mga_indices called without lock held\n");
return -EINVAL;
}
buf = dma->buflist[indices.idx];
buf_priv = buf->dev_private;
buf_priv->discard = indices.discard;
if (!mgaVerifyState(dev_priv)) {
if (indices.discard) {
if (buf_priv->dispatched == 1)
AGEBUF(dev_priv, buf_priv);
if ( !mga_verify_state( dev_priv ) ) {
if ( indices.discard ) {
if ( buf_priv->dispatched == 1 )
AGE_BUFFER( buf_priv );
buf_priv->dispatched = 0;
mga_freelist_put(dev, buf);
mga_freelist_put( dev, buf );
}
return -EINVAL;
}
mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
PRIMUPDATE(dev_priv);
mga_flush_write_combine();
mga_dma_schedule(dev, 1);
return 0;
}
#endif
int mga_dma_iload( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
{
@ -970,12 +950,9 @@ int mga_dma_iload( struct inode *inode, struct file *filp,
if ( copy_from_user( &iload, (drm_mga_iload_t *)arg, sizeof(iload) ) )
return -EFAULT;
#if 1
/* HACK: oh well...
*/
if ( mga_do_wait_for_idle( dev_priv ) < 0 )
return -EBUSY;
#endif
buf = dma->buflist[iload.idx];
buf_priv = buf->dev_private;