mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-08 15:08:05 +02:00
- Misc code clean up in preparation for merge with trunk
- Disable PCIGART Radeon support (not 100% working yet)
This commit is contained in:
parent
a77ca07b80
commit
5c2aa063b6
7 changed files with 90 additions and 62 deletions
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@ -971,11 +971,11 @@ extern int DRM(proc_cleanup)(int minor,
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/* Scatter Gather Support (drm_scatter.h) */
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extern void DRM(sg_cleanup)(drm_sg_mem_t *entry);
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extern int DRM(sg_alloc)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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extern int DRM(sg_free)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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unsigned int cmd, unsigned long arg);
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extern int DRM(sg_free)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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/* ATI Pcigart support (ati_pcigart.h) */
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/* ATI PCIGART support (ati_pcigart.h) */
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extern unsigned long DRM(ati_pcigart_init)(drm_device_t *dev);
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extern int DRM(ati_pcigart_cleanup)(unsigned long address);
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@ -151,28 +151,36 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp,
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{
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int error = 0;
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for(i = 0; i < pages; i++) {
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for ( i = 0 ; i < pages ; i++ ) {
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unsigned long *tmp;
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tmp = (unsigned long *)entry->pagelist[i]->virtual;
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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for ( j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++ ) {
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*tmp = 0xcafebabe;
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}
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tmp = (unsigned long *)((u8 *)entry->virtual +
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(PAGE_SIZE * i));
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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if(*tmp != 0xcafebabe && error == 0) {
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for( j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++ ) {
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if ( *tmp != 0xcafebabe && error == 0 ) {
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error = 1;
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printk("Scatter allocation error, pagelist"
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" does not match virtual mapping\n");
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DRM_ERROR( "Scatter allocation error, "
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"pagelist does not match "
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"virtual mapping\n" );
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}
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}
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tmp = (unsigned long *)entry->pagelist[i]->virtual;
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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for(j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++) {
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*tmp = 0;
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}
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}
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if(error == 0) printk("Scatter allocation matches pagelist\n");
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if (error == 0)
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DRM_ERROR( "Scatter allocation matches pagelist\n" );
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}
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#endif
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@ -971,11 +971,11 @@ extern int DRM(proc_cleanup)(int minor,
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/* Scatter Gather Support (drm_scatter.h) */
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extern void DRM(sg_cleanup)(drm_sg_mem_t *entry);
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extern int DRM(sg_alloc)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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extern int DRM(sg_free)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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unsigned int cmd, unsigned long arg);
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extern int DRM(sg_free)(struct inode *inode, struct file *filp,
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unsigned int cmd, unsigned long arg);
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/* ATI Pcigart support (ati_pcigart.h) */
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/* ATI PCIGART support (ati_pcigart.h) */
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extern unsigned long DRM(ati_pcigart_init)(drm_device_t *dev);
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extern int DRM(ati_pcigart_cleanup)(unsigned long address);
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@ -151,28 +151,36 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp,
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{
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int error = 0;
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for(i = 0; i < pages; i++) {
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for ( i = 0 ; i < pages ; i++ ) {
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unsigned long *tmp;
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tmp = (unsigned long *)entry->pagelist[i]->virtual;
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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for ( j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++ ) {
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*tmp = 0xcafebabe;
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}
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tmp = (unsigned long *)((u8 *)entry->virtual +
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(PAGE_SIZE * i));
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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if(*tmp != 0xcafebabe && error == 0) {
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for( j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++ ) {
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if ( *tmp != 0xcafebabe && error == 0 ) {
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error = 1;
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printk("Scatter allocation error, pagelist"
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" does not match virtual mapping\n");
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DRM_ERROR( "Scatter allocation error, "
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"pagelist does not match "
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"virtual mapping\n" );
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}
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}
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tmp = (unsigned long *)entry->pagelist[i]->virtual;
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for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
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for(j = 0 ;
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j < PAGE_SIZE / sizeof(unsigned long) ;
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j++, tmp++) {
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*tmp = 0;
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}
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}
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if(error == 0) printk("Scatter allocation matches pagelist\n");
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if (error == 0)
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DRM_ERROR( "Scatter allocation matches pagelist\n" );
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}
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#endif
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@ -570,9 +570,11 @@ int r128_do_cleanup_cce( drm_device_t *dev )
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if ( dev->dev_private ) {
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drm_r128_private_t *dev_priv = dev->dev_private;
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DRM_IOREMAPFREE( dev_priv->cce_ring );
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DRM_IOREMAPFREE( dev_priv->ring_rptr );
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DRM_IOREMAPFREE( dev_priv->buffers );
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if ( !dev_priv->is_pci ) {
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DRM_IOREMAPFREE( dev_priv->cce_ring );
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DRM_IOREMAPFREE( dev_priv->ring_rptr );
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DRM_IOREMAPFREE( dev_priv->buffers );
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}
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DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
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DRM_MEM_DRIVER );
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@ -36,7 +36,7 @@
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#include <linux/interrupt.h> /* For task queue support */
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#include <linux/delay.h>
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#define RADEON_FIFO_DEBUG 1
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#define RADEON_FIFO_DEBUG 0
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/* CP microcode (from ATI) */
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@ -373,14 +373,8 @@ static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv,
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}
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#if RADEON_FIFO_DEBUG
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{
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static int fails = 0;
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if (!fails) {
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DRM_ERROR( "failed!\n" );
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radeon_status( dev_priv );
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fails++;
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}
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}
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DRM_ERROR( "failed!\n" );
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radeon_status( dev_priv );
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#endif
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return -EBUSY;
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}
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@ -402,14 +396,8 @@ static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv )
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}
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#if RADEON_FIFO_DEBUG
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{
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static int fails = 0;
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if (!fails) {
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DRM_ERROR( "failed!\n" );
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radeon_status( dev_priv );
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fails++;
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}
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}
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DRM_ERROR( "failed!\n" );
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radeon_status( dev_priv );
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#endif
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return -EBUSY;
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}
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@ -666,6 +654,17 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
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dev_priv->is_pci = init->is_pci;
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#if 1
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/* PCI support is not 100% working, so we disable it here.
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*/
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if ( dev_priv->is_pci ) {
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DRM_ERROR( "PCI GART not yet supported for Radeon!\n" );
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DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
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dev->dev_private = NULL;
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return -EINVAL;
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}
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#endif
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if ( dev_priv->is_pci && !dev->sg ) {
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DRM_DEBUG( "PCI GART memory not allocated!\n" );
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DRM_ERROR( "PCI GART memory not allocated!\n" );
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@ -818,7 +817,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
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+ dev_priv->agp_vm_start);
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else
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#endif
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/* ???????? */
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dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
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- dev->sg->handle
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+ dev_priv->agp_vm_start);
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@ -882,26 +880,29 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
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dev->dev_private = NULL;
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return -EINVAL;
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}
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/* Turn on PCI GART */
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/* Turn on PCI GART
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*/
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tmp = RADEON_READ( RADEON_AIC_CNTL )
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| RADEON_PCIGART_TRANSLATE_EN;
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RADEON_WRITE( RADEON_AIC_CNTL, tmp );
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/* set PCI GART page-table base address */
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/* set PCI GART page-table base address
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*/
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RADEON_WRITE( RADEON_AIC_PT_BASE,
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virt_to_bus( (void *)dev_priv->phys_pci_gart ) );
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/* set address range for PCI address translate */
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/* set address range for PCI address translate
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*/
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RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->agp_vm_start );
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RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->agp_vm_start
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+ dev_priv->agp_size - 1);
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#if 1
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/* ??? turn off AGP aperture */
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/* Turn off AGP aperture -- is this required for PCIGART?
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*/
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RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0 );
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#endif
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} else {
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/* Turn off PCI GART */
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/* Turn off PCI GART
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*/
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tmp = RADEON_READ( RADEON_AIC_CNTL )
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& ~RADEON_PCIGART_TRANSLATE_EN;
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RADEON_WRITE( RADEON_AIC_CNTL, tmp );
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@ -925,9 +926,11 @@ int radeon_do_cleanup_cp( drm_device_t *dev )
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if ( dev->dev_private ) {
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drm_radeon_private_t *dev_priv = dev->dev_private;
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DRM_IOREMAPFREE( dev_priv->cp_ring );
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DRM_IOREMAPFREE( dev_priv->ring_rptr );
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DRM_IOREMAPFREE( dev_priv->buffers );
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if ( !dev_priv->is_pci ) {
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DRM_IOREMAPFREE( dev_priv->cp_ring );
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DRM_IOREMAPFREE( dev_priv->ring_rptr );
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DRM_IOREMAPFREE( dev_priv->buffers );
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}
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DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
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DRM_MEM_DRIVER );
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@ -993,7 +996,7 @@ int radeon_cp_stop( struct inode *inode, struct file *filp,
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drm_radeon_private_t *dev_priv = dev->dev_private;
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drm_radeon_cp_stop_t stop;
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int ret;
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DRM_DEBUG( "\n" );
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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LOCK_TEST_WITH_RETURN( dev );
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@ -1295,7 +1298,10 @@ int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
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}
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/* FIXME: This return value is ignored in the BEGIN_RING macro! */
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#if RADEON_FIFO_DEBUG
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radeon_status( dev_priv );
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DRM_ERROR( "failed!\n" );
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#endif
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return -EBUSY;
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}
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@ -520,13 +520,15 @@ extern int radeon_cp_indirect( struct inode *inode, struct file *filp,
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#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg )
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#ifdef __alpha__
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#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR(reg)))
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#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR( reg )))
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static inline u32 _RADEON_READ(u32 *addr) {
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mb();
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return *(volatile u32 *)addr;
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}
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#define RADEON_WRITE(reg,val) \
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do { wmb(); RADEON_DEREF(reg) = val; } while (0)
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#define RADEON_WRITE(reg,val) do { \
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wmb();
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RADEON_DEREF(reg) = val;
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} while (0)
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#else
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#define RADEON_READ(reg) RADEON_DEREF( reg )
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#define RADEON_WRITE(reg, val) do { RADEON_DEREF( reg ) = val; } while (0)
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@ -534,13 +536,15 @@ static inline u32 _RADEON_READ(u32 *addr) {
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#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg )
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#ifdef __alpha__
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#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR(reg))
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#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR( reg ))
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static inline u8 _RADEON_READ8(u8 *addr) {
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mb();
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return *(volatile u8 *)addr;
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}
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#define RADEON_WRITE8(reg,val) \
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do { wmb(); RADEON_DEREF8(reg) = val; } while (0)
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#define RADEON_WRITE8(reg,val) do { \
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wmb();
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RADEON_DEREF8( reg ) = val;
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} while (0)
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#else
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#define RADEON_READ8(reg) RADEON_DEREF8( reg )
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#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0)
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