- Misc code clean up in preparation for merge with trunk

- Disable PCIGART Radeon support (not 100% working yet)
This commit is contained in:
Kevin E Martin 2001-04-05 14:26:31 +00:00
parent a77ca07b80
commit 5c2aa063b6
7 changed files with 90 additions and 62 deletions

View file

@ -971,11 +971,11 @@ extern int DRM(proc_cleanup)(int minor,
/* Scatter Gather Support (drm_scatter.h) */
extern void DRM(sg_cleanup)(drm_sg_mem_t *entry);
extern int DRM(sg_alloc)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int DRM(sg_free)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
unsigned int cmd, unsigned long arg);
extern int DRM(sg_free)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
/* ATI Pcigart support (ati_pcigart.h) */
/* ATI PCIGART support (ati_pcigart.h) */
extern unsigned long DRM(ati_pcigart_init)(drm_device_t *dev);
extern int DRM(ati_pcigart_cleanup)(unsigned long address);

View file

@ -151,28 +151,36 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp,
{
int error = 0;
for(i = 0; i < pages; i++) {
for ( i = 0 ; i < pages ; i++ ) {
unsigned long *tmp;
tmp = (unsigned long *)entry->pagelist[i]->virtual;
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
for ( j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++ ) {
*tmp = 0xcafebabe;
}
tmp = (unsigned long *)((u8 *)entry->virtual +
(PAGE_SIZE * i));
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
if(*tmp != 0xcafebabe && error == 0) {
for( j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++ ) {
if ( *tmp != 0xcafebabe && error == 0 ) {
error = 1;
printk("Scatter allocation error, pagelist"
" does not match virtual mapping\n");
DRM_ERROR( "Scatter allocation error, "
"pagelist does not match "
"virtual mapping\n" );
}
}
tmp = (unsigned long *)entry->pagelist[i]->virtual;
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
for(j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++) {
*tmp = 0;
}
}
if(error == 0) printk("Scatter allocation matches pagelist\n");
if (error == 0)
DRM_ERROR( "Scatter allocation matches pagelist\n" );
}
#endif

View file

@ -971,11 +971,11 @@ extern int DRM(proc_cleanup)(int minor,
/* Scatter Gather Support (drm_scatter.h) */
extern void DRM(sg_cleanup)(drm_sg_mem_t *entry);
extern int DRM(sg_alloc)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
extern int DRM(sg_free)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
unsigned int cmd, unsigned long arg);
extern int DRM(sg_free)(struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg);
/* ATI Pcigart support (ati_pcigart.h) */
/* ATI PCIGART support (ati_pcigart.h) */
extern unsigned long DRM(ati_pcigart_init)(drm_device_t *dev);
extern int DRM(ati_pcigart_cleanup)(unsigned long address);

View file

@ -151,28 +151,36 @@ int DRM(sg_alloc)( struct inode *inode, struct file *filp,
{
int error = 0;
for(i = 0; i < pages; i++) {
for ( i = 0 ; i < pages ; i++ ) {
unsigned long *tmp;
tmp = (unsigned long *)entry->pagelist[i]->virtual;
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
for ( j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++ ) {
*tmp = 0xcafebabe;
}
tmp = (unsigned long *)((u8 *)entry->virtual +
(PAGE_SIZE * i));
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
if(*tmp != 0xcafebabe && error == 0) {
for( j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++ ) {
if ( *tmp != 0xcafebabe && error == 0 ) {
error = 1;
printk("Scatter allocation error, pagelist"
" does not match virtual mapping\n");
DRM_ERROR( "Scatter allocation error, "
"pagelist does not match "
"virtual mapping\n" );
}
}
tmp = (unsigned long *)entry->pagelist[i]->virtual;
for(j = 0; j < PAGE_SIZE / sizeof(unsigned long); j++, tmp++) {
for(j = 0 ;
j < PAGE_SIZE / sizeof(unsigned long) ;
j++, tmp++) {
*tmp = 0;
}
}
if(error == 0) printk("Scatter allocation matches pagelist\n");
if (error == 0)
DRM_ERROR( "Scatter allocation matches pagelist\n" );
}
#endif

View file

@ -570,9 +570,11 @@ int r128_do_cleanup_cce( drm_device_t *dev )
if ( dev->dev_private ) {
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_IOREMAPFREE( dev_priv->cce_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
if ( !dev_priv->is_pci ) {
DRM_IOREMAPFREE( dev_priv->cce_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
}
DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
DRM_MEM_DRIVER );

View file

@ -36,7 +36,7 @@
#include <linux/interrupt.h> /* For task queue support */
#include <linux/delay.h>
#define RADEON_FIFO_DEBUG 1
#define RADEON_FIFO_DEBUG 0
/* CP microcode (from ATI) */
@ -373,14 +373,8 @@ static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv,
}
#if RADEON_FIFO_DEBUG
{
static int fails = 0;
if (!fails) {
DRM_ERROR( "failed!\n" );
radeon_status( dev_priv );
fails++;
}
}
DRM_ERROR( "failed!\n" );
radeon_status( dev_priv );
#endif
return -EBUSY;
}
@ -402,14 +396,8 @@ static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv )
}
#if RADEON_FIFO_DEBUG
{
static int fails = 0;
if (!fails) {
DRM_ERROR( "failed!\n" );
radeon_status( dev_priv );
fails++;
}
}
DRM_ERROR( "failed!\n" );
radeon_status( dev_priv );
#endif
return -EBUSY;
}
@ -666,6 +654,17 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev_priv->is_pci = init->is_pci;
#if 1
/* PCI support is not 100% working, so we disable it here.
*/
if ( dev_priv->is_pci ) {
DRM_ERROR( "PCI GART not yet supported for Radeon!\n" );
DRM(free)( dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER );
dev->dev_private = NULL;
return -EINVAL;
}
#endif
if ( dev_priv->is_pci && !dev->sg ) {
DRM_DEBUG( "PCI GART memory not allocated!\n" );
DRM_ERROR( "PCI GART memory not allocated!\n" );
@ -818,7 +817,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
+ dev_priv->agp_vm_start);
else
#endif
/* ???????? */
dev_priv->agp_buffers_offset = (dev_priv->buffers->offset
- dev->sg->handle
+ dev_priv->agp_vm_start);
@ -882,26 +880,29 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
dev->dev_private = NULL;
return -EINVAL;
}
/* Turn on PCI GART */
/* Turn on PCI GART
*/
tmp = RADEON_READ( RADEON_AIC_CNTL )
| RADEON_PCIGART_TRANSLATE_EN;
RADEON_WRITE( RADEON_AIC_CNTL, tmp );
/* set PCI GART page-table base address */
/* set PCI GART page-table base address
*/
RADEON_WRITE( RADEON_AIC_PT_BASE,
virt_to_bus( (void *)dev_priv->phys_pci_gart ) );
/* set address range for PCI address translate */
/* set address range for PCI address translate
*/
RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->agp_vm_start );
RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->agp_vm_start
+ dev_priv->agp_size - 1);
#if 1
/* ??? turn off AGP aperture */
/* Turn off AGP aperture -- is this required for PCIGART?
*/
RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0 );
#endif
} else {
/* Turn off PCI GART */
/* Turn off PCI GART
*/
tmp = RADEON_READ( RADEON_AIC_CNTL )
& ~RADEON_PCIGART_TRANSLATE_EN;
RADEON_WRITE( RADEON_AIC_CNTL, tmp );
@ -925,9 +926,11 @@ int radeon_do_cleanup_cp( drm_device_t *dev )
if ( dev->dev_private ) {
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_IOREMAPFREE( dev_priv->cp_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
if ( !dev_priv->is_pci ) {
DRM_IOREMAPFREE( dev_priv->cp_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
}
DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
DRM_MEM_DRIVER );
@ -993,7 +996,7 @@ int radeon_cp_stop( struct inode *inode, struct file *filp,
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_radeon_cp_stop_t stop;
int ret;
DRM_DEBUG( "\n" );
DRM_DEBUG( "%s\n", __FUNCTION__ );
LOCK_TEST_WITH_RETURN( dev );
@ -1295,7 +1298,10 @@ int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
}
/* FIXME: This return value is ignored in the BEGIN_RING macro! */
#if RADEON_FIFO_DEBUG
radeon_status( dev_priv );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
}

View file

@ -520,13 +520,15 @@ extern int radeon_cp_indirect( struct inode *inode, struct file *filp,
#define RADEON_DEREF(reg) *(volatile u32 *)RADEON_ADDR( reg )
#ifdef __alpha__
#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR(reg)))
#define RADEON_READ(reg) (_RADEON_READ((u32 *)RADEON_ADDR( reg )))
static inline u32 _RADEON_READ(u32 *addr) {
mb();
return *(volatile u32 *)addr;
}
#define RADEON_WRITE(reg,val) \
do { wmb(); RADEON_DEREF(reg) = val; } while (0)
#define RADEON_WRITE(reg,val) do { \
wmb();
RADEON_DEREF(reg) = val;
} while (0)
#else
#define RADEON_READ(reg) RADEON_DEREF( reg )
#define RADEON_WRITE(reg, val) do { RADEON_DEREF( reg ) = val; } while (0)
@ -534,13 +536,15 @@ static inline u32 _RADEON_READ(u32 *addr) {
#define RADEON_DEREF8(reg) *(volatile u8 *)RADEON_ADDR( reg )
#ifdef __alpha__
#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR(reg))
#define RADEON_READ8(reg) _RADEON_READ8((u8 *)RADEON_ADDR( reg ))
static inline u8 _RADEON_READ8(u8 *addr) {
mb();
return *(volatile u8 *)addr;
}
#define RADEON_WRITE8(reg,val) \
do { wmb(); RADEON_DEREF8(reg) = val; } while (0)
#define RADEON_WRITE8(reg,val) do { \
wmb();
RADEON_DEREF8( reg ) = val;
} while (0)
#else
#define RADEON_READ8(reg) RADEON_DEREF8( reg )
#define RADEON_WRITE8(reg, val) do { RADEON_DEREF8( reg ) = val; } while (0)