mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-05 10:08:23 +02:00
Restructure cursor handling and add support for legacy cursors
This commit is contained in:
parent
f2351ab38c
commit
5af426a2b2
5 changed files with 262 additions and 99 deletions
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@ -41,7 +41,8 @@ nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
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nv50_fbcon.o
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radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o radeon_gem.o \
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radeon_buffer.o radeon_fence.o atom.o radeon_display.o radeon_atombios.o radeon_i2c.o radeon_connectors.o radeon_cs.o \
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atombios_crtc.o radeon_encoders.o radeon_fb.o radeon_combios.o radeon_legacy_crtc.o radeon_legacy_encoders.o
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atombios_crtc.o radeon_encoders.o radeon_fb.o radeon_combios.o radeon_legacy_crtc.o radeon_legacy_encoders.o \
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radeon_cursor.o
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sis-objs := sis_drv.o sis_mm.o
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ffb-objs := ffb_drv.o ffb_context.o
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savage-objs := savage_drv.o savage_bci.o savage_state.o
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243
linux-core/radeon_cursor.c
Normal file
243
linux-core/radeon_cursor.c
Normal file
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@ -0,0 +1,243 @@
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/*
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* Copyright 2007-8 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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*/
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#include "drmP.h"
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#include "radeon_drm.h"
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#include "radeon_drv.h"
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#define CURSOR_WIDTH 64
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#define CURSOR_HEIGHT 64
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static void radeon_lock_cursor(struct drm_crtc *crtc, bool lock)
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{
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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uint32_t cur_lock;
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if (radeon_is_avivo(dev_priv)) {
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cur_lock = RADEON_READ(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
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if (lock)
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cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK;
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else
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cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
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RADEON_WRITE(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock);
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} else {
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switch(radeon_crtc->crtc_id) {
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case 0:
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cur_lock = RADEON_READ(RADEON_CUR_OFFSET);
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if (lock)
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cur_lock |= RADEON_CUR_LOCK;
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else
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cur_lock &= ~RADEON_CUR_LOCK;
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RADEON_WRITE(RADEON_CUR_OFFSET, cur_lock);
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break;
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case 1:
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cur_lock = RADEON_READ(RADEON_CUR2_OFFSET);
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if (lock)
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cur_lock |= RADEON_CUR2_LOCK;
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else
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cur_lock &= ~RADEON_CUR2_LOCK;
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RADEON_WRITE(RADEON_CUR2_OFFSET, cur_lock);
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break;
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default:
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break;
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}
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}
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}
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static void radeon_hide_cursor(struct drm_crtc *crtc)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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if (radeon_is_avivo(dev_priv)) {
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RADEON_WRITE(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
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RADEON_WRITE_P(RADEON_MM_DATA, 0, ~AVIVO_D1CURSOR_EN);
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} else {
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switch(radeon_crtc->crtc_id) {
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case 0:
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RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
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break;
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case 1:
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RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
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break;
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default:
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return;
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}
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RADEON_WRITE_P(RADEON_MM_DATA, 0, ~RADEON_CRTC_CUR_EN);
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}
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}
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static void radeon_show_cursor(struct drm_crtc *crtc)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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if (radeon_is_avivo(dev_priv)) {
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RADEON_WRITE(RADEON_MM_INDEX, AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset);
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RADEON_WRITE(RADEON_MM_DATA, AVIVO_D1CURSOR_EN |
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(AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
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} else {
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switch(radeon_crtc->crtc_id) {
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case 0:
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RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC_GEN_CNTL);
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break;
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case 1:
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RADEON_WRITE(RADEON_MM_INDEX, RADEON_CRTC2_GEN_CNTL);
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break;
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default:
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return;
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}
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RADEON_WRITE_P(RADEON_MM_DATA, (RADEON_CRTC_CUR_EN |
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(RADEON_CRTC_CUR_MODE_24BPP << RADEON_CRTC_CUR_MODE_SHIFT)),
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~(RADEON_CRTC_CUR_EN | RADEON_CRTC_CUR_MODE_MASK));
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}
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}
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static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
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uint32_t width, uint32_t height)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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struct drm_radeon_gem_object *obj_priv;
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obj_priv = obj->driver_private;
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if (radeon_is_avivo(dev_priv)) {
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RADEON_WRITE(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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dev_priv->fb_location + obj_priv->bo->offset);
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RADEON_WRITE(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
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(width - 1) << 16 | (height - 1));
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} else {
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switch(radeon_crtc->crtc_id) {
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case 0:
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/* offset is from DISP_BASE_ADDRESS */
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RADEON_WRITE(RADEON_CUR_OFFSET, obj_priv->bo->offset);
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break;
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case 1:
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/* offset is from DISP2_BASE_ADDRESS */
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RADEON_WRITE(RADEON_CUR2_OFFSET, obj_priv->bo->offset);
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break;
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default:
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break;
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}
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}
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}
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int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width,
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uint32_t height)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_gem_object *obj;
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if (!handle) {
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/* turn off cursor */
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radeon_hide_cursor(crtc);
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return 0;
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}
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obj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
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if (!obj) {
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DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id);
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return -EINVAL;
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}
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if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) {
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DRM_ERROR("bad cursor width or height %d x %d\n", width, height);
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return -EINVAL;
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}
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radeon_lock_cursor(crtc, true);
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// XXX only 27 bit offset for legacy cursor
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radeon_set_cursor(crtc, obj, width, height);
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radeon_show_cursor(crtc);
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radeon_lock_cursor(crtc, false);
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mutex_lock(&crtc->dev->struct_mutex);
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drm_gem_object_unreference(obj);
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mutex_unlock(&crtc->dev->struct_mutex);
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return 0;
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}
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int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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int x, int y)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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int xorigin = 0, yorigin = 0;
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if (x < 0)
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xorigin = -x + 1;
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if (y < 0)
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yorigin = -x + 1;
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if (xorigin >= CURSOR_WIDTH)
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xorigin = CURSOR_WIDTH - 1;
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if (yorigin >= CURSOR_WIDTH)
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yorigin = CURSOR_WIDTH - 1;
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radeon_lock_cursor(crtc, true);
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if (radeon_is_avivo(dev_priv)) {
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RADEON_WRITE(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
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((xorigin ? 0: x) << 16) |
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(yorigin ? 0 : y));
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RADEON_WRITE(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);
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} else {
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if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)
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y /= 2;
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else if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
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y *= 2;
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switch(radeon_crtc->crtc_id) {
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case 0:
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RADEON_WRITE(RADEON_CUR_HORZ_VERT_OFF, (RADEON_CUR_LOCK
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| (xorigin << 16)
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| yorigin));
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RADEON_WRITE(RADEON_CUR_HORZ_VERT_POSN, (RADEON_CUR_LOCK
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| ((xorigin ? 0 : x) << 16)
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| (yorigin ? 0 : y)));
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break;
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case 1:
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RADEON_WRITE(RADEON_CUR2_HORZ_VERT_OFF, (RADEON_CUR2_LOCK
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| (xorigin << 16)
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| yorigin));
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RADEON_WRITE(RADEON_CUR2_HORZ_VERT_POSN, (RADEON_CUR2_LOCK
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| ((xorigin ? 0 : x) << 16)
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| (yorigin ? 0 : y)));
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break;
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default:
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break;
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}
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}
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radeon_lock_cursor(crtc, false);
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return 0;
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}
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@ -32,9 +32,6 @@
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#include "drm_crtc_helper.h"
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#define CURSOR_WIDTH 64
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#define CURSOR_HEIGHT 64
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int radeon_ddc_dump(struct drm_connector *connector);
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@ -124,96 +121,6 @@ void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
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radeon_crtc->lut_b[regno] = blue >> 8;
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}
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static void avivo_lock_cursor(struct drm_crtc *crtc, bool lock)
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{
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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uint32_t tmp;
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tmp = RADEON_READ(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset);
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if (lock)
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tmp |= AVIVO_D1CURSOR_UPDATE_LOCK;
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else
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tmp &= ~AVIVO_D1CURSOR_UPDATE_LOCK;
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RADEON_WRITE(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, tmp);
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}
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static int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width,
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uint32_t height)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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struct drm_gem_object *obj;
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struct drm_radeon_gem_object *obj_priv;
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if (!handle) {
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RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, 0);
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return 0;
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/* turn off cursor */
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}
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obj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
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if (!obj) {
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DRM_ERROR("Cannot find cursor object %x for crtc %d\n", handle, radeon_crtc->crtc_id);
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return -EINVAL;
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}
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obj_priv = obj->driver_private;
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RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, 0);
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if (radeon_is_avivo(dev_priv)) {
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RADEON_WRITE(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
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dev_priv->fb_location + obj_priv->bo->offset);
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RADEON_WRITE(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset,
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(CURSOR_WIDTH - 1) << 16 | (CURSOR_HEIGHT - 1));
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RADEON_WRITE(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset,
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AVIVO_D1CURSOR_EN | (AVIVO_D1CURSOR_MODE_24BPP << AVIVO_D1CURSOR_MODE_SHIFT));
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}
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mutex_lock(&crtc->dev->struct_mutex);
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drm_gem_object_unreference(obj);
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mutex_unlock(&crtc->dev->struct_mutex);
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return 0;
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}
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static int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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int x, int y)
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{
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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struct drm_radeon_private *dev_priv = crtc->dev->dev_private;
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int xorigin = 0, yorigin = 0;
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if (x < 0) xorigin = -x+1;
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if (y < 0) yorigin = -x+1;
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if (xorigin >= CURSOR_WIDTH) xorigin = CURSOR_WIDTH - 1;
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if (yorigin >= CURSOR_WIDTH) yorigin = CURSOR_WIDTH - 1;
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if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE)
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y /= 2;
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else if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
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y *= 2;
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if (radeon_is_avivo(dev_priv)) {
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avivo_lock_cursor(crtc, true);
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RADEON_WRITE(AVIVO_D1CUR_POSITION + radeon_crtc->crtc_offset,
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((xorigin ? 0: x) << 16) |
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(yorigin ? 0 : y));
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RADEON_WRITE(AVIVO_D1CUR_HOT_SPOT + radeon_crtc->crtc_offset, (xorigin << 16) | yorigin);
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avivo_lock_cursor(crtc, false);
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}
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return 0;
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}
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static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
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u16 *blue, uint32_t size)
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{
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@ -393,6 +393,15 @@ extern void atombios_crtc_mode_set(struct drm_crtc *crtc,
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struct drm_display_mode *adjusted_mode,
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int x, int y);
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extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
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extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
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struct drm_file *file_priv,
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uint32_t handle,
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uint32_t width,
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uint32_t height);
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extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
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int x, int y);
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extern bool radeon_atom_get_clock_info(struct drm_device *dev);
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extern bool radeon_combios_get_clock_info(struct drm_device *dev);
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extern void radeon_get_lvds_info(struct radeon_encoder *encoder);
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@ -374,6 +374,9 @@
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# define RADEON_CRTC_ICON_EN (1 << 15)
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# define RADEON_CRTC_CUR_EN (1 << 16)
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# define RADEON_CRTC_CUR_MODE_MASK (7 << 20)
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# define RADEON_CRTC_CUR_MODE_SHIFT 20
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# define RADEON_CRTC_CUR_MODE_MONO 0
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# define RADEON_CRTC_CUR_MODE_24BPP 2
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# define RADEON_CRTC_EXT_DISP_EN (1 << 24)
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# define RADEON_CRTC_EN (1 << 25)
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# define RADEON_CRTC_DISP_REQ_EN_B (1 << 26)
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@ -3591,14 +3594,14 @@
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#define AVIVO_D1GRPH_X_END 0x6134
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#define AVIVO_D1GRPH_Y_END 0x6138
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#define AVIVO_D1GRPH_UPDATE 0x6144
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# define AVIVO_D1GRPH_UPDATE_LOCK (1<<16)
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# define AVIVO_D1GRPH_UPDATE_LOCK (1 << 16)
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#define AVIVO_D1GRPH_FLIP_CONTROL 0x6148
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#define AVIVO_D1CUR_CONTROL 0x6400
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# define AVIVO_D1CURSOR_EN (1<<0)
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# define AVIVO_D1CURSOR_MODE_SHIFT 8
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# define AVIVO_D1CURSOR_MODE_MASK (0x3<<8)
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||||
# define AVIVO_D1CURSOR_MODE_24BPP (0x2)
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# define AVIVO_D1CURSOR_EN (1 << 0)
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# define AVIVO_D1CURSOR_MODE_SHIFT 8
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# define AVIVO_D1CURSOR_MODE_MASK (3 << 8)
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# define AVIVO_D1CURSOR_MODE_24BPP 2
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#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408
|
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#define AVIVO_D1CUR_SIZE 0x6410
|
||||
#define AVIVO_D1CUR_POSITION 0x6414
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue