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merge from trunk into bsd-2-0-0 branch (4.1.0)

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This commit is contained in:
Alan Hourihane 2001-06-24 22:19:56 +00:00
parent 6ac03b936f
commit 5a2aa17b8b
18 changed files with 199 additions and 65 deletions
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2
libdrm/xf86drm.c
View file

@ -27,7 +27,7 @@
* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
* Kevin E. Martin <martin@valinux.com>
*
* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.20 2001/04/18 18:44:39 dawes Exp $
* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.22 2001/05/19 00:26:45 dawes Exp $
*
*/

11
linux-core/drm_dma.c
View file

@ -42,6 +42,15 @@
#ifndef __HAVE_DMA_RECLAIM
#define __HAVE_DMA_RECLAIM 0
#endif
#ifndef __HAVE_SHARED_IRQ
#define __HAVE_SHARED_IRQ 0
#endif
#if __HAVE_SHARED_IRQ
#define DRM_IRQ_TYPE SA_SHIRQ
#else
#define DRM_IRQ_TYPE 0
#endif
#if __HAVE_DMA
@ -544,7 +553,7 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
/* Install handler */
ret = request_irq( dev->irq, DRM(dma_service),
0, dev->devname, dev );
DRM_IRQ_TYPE, dev->devname, dev );
if ( ret < 0 ) {
DRM_OS_LOCK;
dev->irq = 0;

9
linux-core/i810_dma.c
View file

@ -1105,6 +1105,8 @@ int i810_dma_vertex( DRM_OS_IOCTL )
DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
vertex.idx, vertex.used, vertex.discard);
if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
i810_dma_dispatch_vertex( dev,
dma->buflist[ vertex.idx ],
vertex.discard, vertex.used );
@ -1131,6 +1133,11 @@ int i810_clear_bufs( DRM_OS_IOCTL )
DRM_OS_RETURN( EINVAL );
}
/* GH: Someone's doing nasty things... */
if (!dev->dev_private) {
return -EINVAL;
}
i810_dma_dispatch_clear( dev, clear.flags,
clear.clear_color,
clear.clear_depth );
@ -1214,7 +1221,7 @@ int i810_copybuf( DRM_OS_IOCTL )
DRM_OS_KRNFROMUSR( d, (drm_i810_copy_t *) data, sizeof(d) );
if(d.idx > dma->buf_count) DRM_OS_RETURN( EINVAL );
if(d.idx < 0 || d.idx > dma->buf_count) DRM_OS_RETURN(EINVAL);
buf = dma->buflist[ d.idx ];
buf_priv = buf->dev_private;
if (buf_priv->currently_mapped != I810_BUF_MAPPED) return -EPERM;

5
linux-core/i810_drm.h
View file

@ -98,8 +98,13 @@ typedef struct _drm_i810_init {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02
} func;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int ring_map_idx;
int buffer_map_idx;
#else
unsigned int mmio_offset;
unsigned int buffers_offset;
#endif
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;

6
linux-core/i810_drv.c
View file

@ -49,11 +49,11 @@
#define DRIVER_NAME "i810"
#define DRIVER_DESC "Intel i810"
#define DRIVER_DATE "20010215"
#define DRIVER_DATE "20010616"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 1
#define DRIVER_PATCHLEVEL 0
#define DRIVER_PATCHLEVEL 1
#ifdef __FreeBSD__
static int i810_probe(device_t dev)
@ -123,4 +123,4 @@ static int i810_probe(device_t dev)
#ifdef __FreeBSD__
DRIVER_MODULE(i810, pci, i810_driver, i810_devclass, 0, 0);
#endif
#endif

37
linux/drm.h
View file

@ -45,8 +45,27 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
#define XFREE86_VERSION(major,minor,patch,snap) \
((major << 16) | (minor < 8) | patch)
#ifndef CONFIG_XFREE86_VERSION
#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
#endif
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
#define DRM_PROC_DEVICES "/proc/devices"
#define DRM_PROC_MISC "/proc/misc"
#define DRM_PROC_DRM "/proc/drm"
#define DRM_DEV_DRM "/dev/drm"
#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
#define DRM_DEV_UID 0
#define DRM_DEV_GID 0
#endif
#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
#define DRM_MAJOR 226
#define DRM_MAX_MINOR 15
#endif
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@ -437,15 +456,15 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44)
#define DRM_IOCTL_R128_RESET DRM_IO( 0x46)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x47, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x48)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x49, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x4a, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4b, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4c, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4d, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4e, drm_r128_stipple_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t)
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
/* Radeon specific ioctls */
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t)
@ -459,9 +478,9 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t)
/* SiS specific ioctls */
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)

11
linux/drm_dma.h
View file

@ -42,6 +42,15 @@
#ifndef __HAVE_DMA_RECLAIM
#define __HAVE_DMA_RECLAIM 0
#endif
#ifndef __HAVE_SHARED_IRQ
#define __HAVE_SHARED_IRQ 0
#endif
#if __HAVE_SHARED_IRQ
#define DRM_IRQ_TYPE SA_SHIRQ
#else
#define DRM_IRQ_TYPE 0
#endif
#if __HAVE_DMA
@ -544,7 +553,7 @@ int DRM(irq_install)( drm_device_t *dev, int irq )
/* Install handler */
ret = request_irq( dev->irq, DRM(dma_service),
0, dev->devname, dev );
DRM_IRQ_TYPE, dev->devname, dev );
if ( ret < 0 ) {
DRM_OS_LOCK;
dev->irq = 0;

22
linux/i810.h
View file

@ -62,9 +62,10 @@
#define __HAVE_DMA_IRQ 1
#define __HAVE_DMA_IRQ_BH 1
#define __HAVE_SHARED_IRQ 1
#define DRIVER_PREINSTALL() do { \
drm_i810_private_t *dev_priv = \
(drm_i810_private_t *)dev->dev_private; \
(drm_i810_private_t *)dev->dev_private; \
u16 tmp; \
tmp = I810_READ16( I810REG_HWSTAM ); \
tmp = tmp & 0x6000; \
@ -80,7 +81,7 @@
#define DRIVER_POSTINSTALL() do { \
drm_i810_private_t *dev_priv = \
(drm_i810_private_t *)dev->dev_private; \
(drm_i810_private_t *)dev->dev_private; \
u16 tmp; \
tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
tmp = tmp & 0x6000; \
@ -90,15 +91,18 @@
#define DRIVER_UNINSTALL() do { \
drm_i810_private_t *dev_priv = \
(drm_i810_private_t *)dev->dev_private; \
(drm_i810_private_t *)dev->dev_private; \
u16 tmp; \
tmp = I810_READ16( I810REG_INT_IDENTITY_R ); \
tmp = tmp & ~(0x6000); /* Clear all interrupts */ \
if ( tmp != 0 ) I810_WRITE16( I810REG_INT_IDENTITY_R, tmp ); \
if ( dev_priv ) { \
tmp = I810_READ16( I810REG_INT_IDENTITY_R ); \
tmp = tmp & ~(0x6000); /* Clear all interrupts */ \
if ( tmp != 0 ) \
I810_WRITE16( I810REG_INT_IDENTITY_R, tmp ); \
\
tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
tmp = tmp & 0x6000; /* Disable all interrupts */ \
I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
tmp = I810_READ16( I810REG_INT_ENABLE_R ); \
tmp = tmp & 0x6000; /* Disable all interrupts */ \
I810_WRITE16( I810REG_INT_ENABLE_R, tmp ); \
} \
} while (0)
/* Buffer customization:

9
linux/i810_dma.c
View file

@ -1105,6 +1105,8 @@ int i810_dma_vertex( DRM_OS_IOCTL )
DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
vertex.idx, vertex.used, vertex.discard);
if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
i810_dma_dispatch_vertex( dev,
dma->buflist[ vertex.idx ],
vertex.discard, vertex.used );
@ -1131,6 +1133,11 @@ int i810_clear_bufs( DRM_OS_IOCTL )
DRM_OS_RETURN( EINVAL );
}
/* GH: Someone's doing nasty things... */
if (!dev->dev_private) {
return -EINVAL;
}
i810_dma_dispatch_clear( dev, clear.flags,
clear.clear_color,
clear.clear_depth );
@ -1214,7 +1221,7 @@ int i810_copybuf( DRM_OS_IOCTL )
DRM_OS_KRNFROMUSR( d, (drm_i810_copy_t *) data, sizeof(d) );
if(d.idx > dma->buf_count) DRM_OS_RETURN( EINVAL );
if(d.idx < 0 || d.idx > dma->buf_count) DRM_OS_RETURN(EINVAL);
buf = dma->buflist[ d.idx ];
buf_priv = buf->dev_private;
if (buf_priv->currently_mapped != I810_BUF_MAPPED) return -EPERM;

5
linux/i810_drm.h
View file

@ -98,8 +98,13 @@ typedef struct _drm_i810_init {
I810_INIT_DMA = 0x01,
I810_CLEANUP_DMA = 0x02
} func;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int ring_map_idx;
int buffer_map_idx;
#else
unsigned int mmio_offset;
unsigned int buffers_offset;
#endif
int sarea_priv_offset;
unsigned int ring_start;
unsigned int ring_end;

6
linux/i810_drv.c
View file

@ -49,11 +49,11 @@
#define DRIVER_NAME "i810"
#define DRIVER_DESC "Intel i810"
#define DRIVER_DATE "20010215"
#define DRIVER_DATE "20010616"
#define DRIVER_MAJOR 1
#define DRIVER_MINOR 1
#define DRIVER_PATCHLEVEL 0
#define DRIVER_PATCHLEVEL 1
#ifdef __FreeBSD__
static int i810_probe(device_t dev)
@ -123,4 +123,4 @@ static int i810_probe(device_t dev)
#ifdef __FreeBSD__
DRIVER_MODULE(i810, pci, i810_driver, i810_devclass, 0, 0);
#endif
#endif

4
linux/mga_state.c
View file

@ -933,6 +933,7 @@ int mga_dma_vertex( DRM_OS_IOCTL )
DRM_OS_KRNFROMUSR( vertex, (drm_mga_vertex_t *) data, sizeof(vertex) );
if(vertex.idx < 0 || vertex.idx > dma->buf_count) return -EINVAL;
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
@ -969,6 +970,8 @@ int mga_dma_indices( DRM_OS_IOCTL )
DRM_OS_KRNFROMUSR( indices, (drm_mga_indices_t *) data, sizeof(indices) );
if(indices.idx < 0 || indices.idx > dma->buf_count) return -EINVAL;
buf = dma->buflist[indices.idx];
buf_priv = buf->dev_private;
@ -1012,6 +1015,7 @@ int mga_dma_iload( DRM_OS_IOCTL )
DRM_OS_RETURN( EBUSY );
}
#endif
if(iload.idx < 0 || iload.idx > dma->buf_count) return -EINVAL;
buf = dma->buflist[iload.idx];
buf_priv = buf->dev_private;

6
linux/r128_cce.c
View file

@ -134,7 +134,9 @@ static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv )
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
#endif
DRM_OS_RETURN( EBUSY );
}
@ -148,7 +150,9 @@ static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
#endif
DRM_OS_RETURN( EBUSY );
}
@ -167,7 +171,9 @@ int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
#endif
DRM_OS_RETURN( EBUSY );
}

32
linux/r128_drm.h
View file

@ -175,7 +175,11 @@ typedef struct drm_r128_init {
R128_INIT_CCE = 0x01,
R128_CLEANUP_CCE = 0x02
} func;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int sarea_priv_offset;
#else
unsigned long sarea_priv_offset;
#endif
int is_pci;
int cce_mode;
int cce_secure;
@ -189,12 +193,21 @@ typedef struct drm_r128_init {
unsigned int depth_offset, depth_pitch;
unsigned int span_offset;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
unsigned int fb_offset;
unsigned int mmio_offset;
unsigned int ring_offset;
unsigned int ring_rptr_offset;
unsigned int buffers_offset;
unsigned int agp_textures_offset;
#else
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
#endif
} drm_r128_init_t;
typedef struct drm_r128_cce_stop {
@ -202,19 +215,17 @@ typedef struct drm_r128_cce_stop {
int idle;
} drm_r128_cce_stop_t;
typedef struct drm_r128_fullscreen {
enum {
R128_INIT_FULLSCREEN = 0x01,
R128_CLEANUP_FULLSCREEN = 0x02
} func;
} drm_r128_fullscreen_t;
typedef struct drm_r128_clear {
unsigned int flags;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int x, y, w, h;
#endif
unsigned int clear_color;
unsigned int clear_depth;
#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
unsigned int color_mask;
unsigned int depth_mask;
#endif
} drm_r128_clear_t;
typedef struct drm_r128_vertex {
@ -266,4 +277,11 @@ typedef struct drm_r128_indirect {
int discard;
} drm_r128_indirect_t;
typedef struct drm_r128_fullscreen {
enum {
R128_INIT_FULLSCREEN = 0x01,
R128_CLEANUP_FULLSCREEN = 0x02
} func;
} drm_r128_fullscreen_t;
#endif

6
linux/radeon_cp.c
View file

@ -937,12 +937,6 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
*/
RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */
RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */
#if defined(__alpha__)
/* HACK! something is clobbering MEM_CNTL on Alpha! */
DRM_ERROR( "MEM_CNTL 0x%x\n",
RADEON_READ(0x0140) );
RADEON_WRITE(0x0140, 0x29002901);
#endif
} else {
#endif
/* Turn off PCI GART

19
linux/sis_drm.h
View file

@ -17,11 +17,20 @@ typedef struct {
unsigned int left, right;
} drm_sis_flip_t;
int sis_fb_alloc(DRM_OS_IOCTL);
int sis_fb_free(DRM_OS_IOCTL);
#ifdef __KERNEL__
int sisp_agp_init(DRM_OS_IOCTL);
int sisp_agp_alloc(DRM_OS_IOCTL);
int sisp_agp_free(DRM_OS_IOCTL);
int sis_fb_alloc(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
int sis_fb_free(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
int sisp_agp_init(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
int sisp_agp_alloc(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
int sisp_agp_free(struct inode *inode, struct file *filp, unsigned int cmd,
unsigned long arg);
#endif
#endif

37
shared-core/drm.h
View file

@ -45,8 +45,27 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
#define XFREE86_VERSION(major,minor,patch,snap) \
((major << 16) | (minor < 8) | patch)
#ifndef CONFIG_XFREE86_VERSION
#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
#endif
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
#define DRM_PROC_DEVICES "/proc/devices"
#define DRM_PROC_MISC "/proc/misc"
#define DRM_PROC_DRM "/proc/drm"
#define DRM_DEV_DRM "/dev/drm"
#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
#define DRM_DEV_UID 0
#define DRM_DEV_GID 0
#endif
#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
#define DRM_MAJOR 226
#define DRM_MAX_MINOR 15
#endif
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@ -437,15 +456,15 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44)
#define DRM_IOCTL_R128_RESET DRM_IO( 0x46)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x47, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x48)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x49, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x4a, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4b, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4c, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4d, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4e, drm_r128_stipple_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t)
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
/* Radeon specific ioctls */
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t)
@ -459,9 +478,9 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t)
/* SiS specific ioctls */
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)

37
shared/drm.h
View file

@ -45,8 +45,27 @@
#define DRM_IOCTL_NR(n) ((n) & 0xff)
#endif
#define XFREE86_VERSION(major,minor,patch,snap) \
((major << 16) | (minor < 8) | patch)
#ifndef CONFIG_XFREE86_VERSION
#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
#endif
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
#define DRM_PROC_DEVICES "/proc/devices"
#define DRM_PROC_MISC "/proc/misc"
#define DRM_PROC_DRM "/proc/drm"
#define DRM_DEV_DRM "/dev/drm"
#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
#define DRM_DEV_UID 0
#define DRM_DEV_GID 0
#endif
#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
#define DRM_MAJOR 226
#define DRM_MAX_MINOR 15
#endif
#define DRM_NAME "drm" /* Name in kernel, /dev, and /proc */
#define DRM_MIN_ORDER 5 /* At least 2^5 bytes = 32 bytes */
#define DRM_MAX_ORDER 22 /* Up to 2^22 bytes = 4MB */
@ -437,15 +456,15 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44)
#define DRM_IOCTL_R128_RESET DRM_IO( 0x46)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x47, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x48)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x49, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x4a, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4b, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4c, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4d, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4e, drm_r128_stipple_t)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t)
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
/* Radeon specific ioctls */
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( 0x40, drm_radeon_init_t)
@ -459,9 +478,9 @@ typedef struct drm_scatter_gather {
#define DRM_IOCTL_RADEON_CLEAR DRM_IOW( 0x48, drm_radeon_clear_t)
#define DRM_IOCTL_RADEON_VERTEX DRM_IOW( 0x49, drm_radeon_vertex_t)
#define DRM_IOCTL_RADEON_INDICES DRM_IOW( 0x4a, drm_radeon_indices_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4b, drm_radeon_texture_t)
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
#define DRM_IOCTL_RADEON_TEXTURE DRM_IOWR(0x4e, drm_radeon_texture_t)
/* SiS specific ioctls */
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)