mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 19:50:12 +01:00
ati_pcigart: stop working in the evenings you mess up too often
This commit is contained in:
parent
2712cdeec3
commit
4c6ec02eb8
1 changed files with 12 additions and 9 deletions
|
|
@ -36,6 +36,9 @@
|
||||||
# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
|
# define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */
|
||||||
# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
|
# define ATI_PCIGART_PAGE_MASK (~(ATI_PCIGART_PAGE_SIZE-1))
|
||||||
|
|
||||||
|
#define ATI_PCIE_WRITE 0x4
|
||||||
|
#define ATI_PCIE_READ 0x8
|
||||||
|
|
||||||
static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
|
static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
|
||||||
struct drm_ati_pcigart_info *gart_info)
|
struct drm_ati_pcigart_info *gart_info)
|
||||||
{
|
{
|
||||||
|
|
@ -105,6 +108,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
|
||||||
dma_addr_t bus_address = 0;
|
dma_addr_t bus_address = 0;
|
||||||
int i, j, ret = 0;
|
int i, j, ret = 0;
|
||||||
int max_pages;
|
int max_pages;
|
||||||
|
dma_addr_t entry_addr;
|
||||||
|
|
||||||
if (!entry) {
|
if (!entry) {
|
||||||
DRM_ERROR("no scatter/gather memory!\n");
|
DRM_ERROR("no scatter/gather memory!\n");
|
||||||
|
|
@ -151,27 +155,26 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
|
||||||
goto done;
|
goto done;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
entry_addr = entry->busaddr[i];
|
||||||
for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
|
for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {
|
||||||
|
page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
|
||||||
switch(gart_info->gart_reg_if) {
|
switch(gart_info->gart_reg_if) {
|
||||||
case DRM_ATI_GART_IGP:
|
case DRM_ATI_GART_IGP:
|
||||||
page_base = (u32) entry->busaddr[i] & ATI_PCIGART_PAGE_MASK;
|
page_base |= (upper_32_bits(entry_addr) & 0xff) << 4;
|
||||||
page_base |= (upper_32_bits(entry->busaddr[i]) & 0xff) << 4;
|
page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
|
||||||
*pci_gart = cpu_to_le32((page_base) | 0xc);
|
|
||||||
break;
|
break;
|
||||||
case DRM_ATI_GART_PCIE:
|
case DRM_ATI_GART_PCIE:
|
||||||
page_base = (u32)(entry->busaddr[i] & ATI_PCIGART_PAGE_MASK);
|
|
||||||
page_base >>= 8;
|
page_base >>= 8;
|
||||||
page_base |= (upper_32_bits(entry->busaddr[i]) & 0xff) << 24;
|
page_base |= (upper_32_bits(entry_addr) & 0xff) << 24;
|
||||||
*pci_gart = cpu_to_le32((page_base >> 8) | 0xc);
|
page_base |= 0xc;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
case DRM_ATI_GART_PCI:
|
case DRM_ATI_GART_PCI:
|
||||||
page_base = (u32) entry->busaddr[i];
|
|
||||||
*pci_gart = cpu_to_le32(page_base);
|
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
*pci_gart = cpu_to_le32(page_base);
|
||||||
pci_gart++;
|
pci_gart++;
|
||||||
page_base += ATI_PCIGART_PAGE_SIZE;
|
entry_addr += ATI_PCIGART_PAGE_SIZE;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Add table
Reference in a new issue