radeon: drop CS2 into CS, remove start/end offset

This commit is contained in:
Dave Airlie 2008-12-19 16:31:55 +10:00
parent 12e68f8059
commit 4b10ddff78
6 changed files with 4 additions and 125 deletions

View file

@ -37,8 +37,6 @@
struct radeon_cs_reloc {
struct radeon_bo *bo;
uint32_t start_offset;
uint32_t end_offset;
uint32_t read_domain;
uint32_t write_domain;
uint32_t flags;
@ -69,8 +67,6 @@ struct radeon_cs_funcs {
int (*cs_write_dword)(struct radeon_cs *cs, uint32_t dword);
int (*cs_write_reloc)(struct radeon_cs *cs,
struct radeon_bo *bo,
uint32_t start_offset,
uint32_t end_offset,
uint32_t read_domain,
uint32_t write_domain,
uint32_t flags);
@ -108,16 +104,12 @@ static inline int radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
static inline int radeon_cs_write_reloc(struct radeon_cs *cs,
struct radeon_bo *bo,
uint32_t start_offset,
uint32_t end_offset,
uint32_t read_domain,
uint32_t write_domain,
uint32_t flags)
{
return cs->csm->funcs->cs_write_reloc(cs,
bo,
start_offset,
end_offset,
read_domain,
write_domain,
flags);

View file

@ -43,8 +43,6 @@
#pragma pack(1)
struct cs_reloc_gem {
uint32_t handle;
uint32_t start_offset;
uint32_t end_offset;
uint32_t read_domain;
uint32_t write_domain;
uint32_t flags;
@ -127,8 +125,6 @@ static int cs_gem_write_dword(struct radeon_cs *cs, uint32_t dword)
static int cs_gem_write_reloc(struct radeon_cs *cs,
struct radeon_bo *bo,
uint32_t start_offset,
uint32_t end_offset,
uint32_t read_domain,
uint32_t write_domain,
uint32_t flags)
@ -151,13 +147,6 @@ static int cs_gem_write_reloc(struct radeon_cs *cs,
if (write_domain == RADEON_GEM_DOMAIN_CPU) {
return -EINVAL;
}
/* check reloc window */
if (end_offset > bo->size) {
return -EINVAL;
}
if (start_offset > end_offset) {
return -EINVAL;
}
/* check if bo is already referenced */
for(i = 0; i < cs->crelocs; i++) {
idx = i * 6;
@ -177,13 +166,6 @@ static int cs_gem_write_reloc(struct radeon_cs *cs,
}
reloc->read_domain |= read_domain;
reloc->write_domain |= write_domain;
/* update start and end offset */
if (start_offset < reloc->start_offset) {
reloc->start_offset = start_offset;
}
if (end_offset > reloc->end_offset) {
reloc->end_offset = end_offset;
}
/* update flags */
reloc->flags |= (flags & reloc->flags);
/* write relocation packet */
@ -215,8 +197,6 @@ static int cs_gem_write_reloc(struct radeon_cs *cs,
idx = (csg->base.crelocs++) * 6;
reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
reloc->handle = bo->handle;
reloc->start_offset = start_offset;
reloc->end_offset = end_offset;
reloc->read_domain = read_domain;
reloc->write_domain = write_domain;
reloc->flags = flags;

View file

@ -29,11 +29,11 @@
#include "radeon_drv.h"
#include "r300_reg.h"
int radeon_cs2_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
{
struct drm_radeon_cs_parser parser;
struct drm_radeon_private *dev_priv = dev->dev_private;
struct drm_radeon_cs2 *cs = data;
struct drm_radeon_cs *cs = data;
uint32_t cs_id;
struct drm_radeon_cs_chunk __user **chunk_ptr = NULL;
uint64_t *chunk_array;
@ -98,11 +98,6 @@ int radeon_cs2_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
if (parser.chunks[i].chunk_id == RADEON_CHUNK_ID_IB)
parser.ib_index = i;
if (parser.chunks[i].chunk_id == RADEON_CHUNK_ID_OLD) {
parser.ib_index = i;
parser.reloc_index = -1;
}
parser.chunks[i].length_dw = user_chunk.length_dw;
parser.chunks[i].chunk_data = (uint32_t *)(unsigned long)user_chunk.chunk_data;
@ -111,7 +106,6 @@ int radeon_cs2_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
switch(parser.chunks[i].chunk_id) {
case RADEON_CHUNK_ID_IB:
case RADEON_CHUNK_ID_OLD:
if (size == 0) {
r = -EINVAL;
goto out;
@ -178,80 +172,6 @@ out:
return r;
}
int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv)
{
struct drm_radeon_cs_parser parser;
struct drm_radeon_private *dev_priv = dev->dev_private;
struct drm_radeon_cs *cs = data;
uint32_t *packets = NULL;
uint32_t cs_id;
long size;
int r;
struct drm_radeon_kernel_chunk chunk_fake[1];
/* set command stream id to 0 which is fake id */
cs_id = 0;
cs->cs_id = cs_id;
if (dev_priv == NULL) {
DRM_ERROR("called with no initialization\n");
return -EINVAL;
}
if (!cs->dwords) {
return 0;
}
/* limit cs to 64K ib */
if (cs->dwords > (16 * 1024)) {
return -EINVAL;
}
/* copy cs from userspace maybe we should copy into ib to save
* one copy but ib will be mapped wc so not good for cmd checking
* somethings worth testing i guess (Jerome)
*/
size = cs->dwords * sizeof(uint32_t);
packets = drm_alloc(size, DRM_MEM_DRIVER);
if (packets == NULL) {
return -ENOMEM;
}
if (DRM_COPY_FROM_USER(packets, (void __user *)(unsigned long)cs->packets, size)) {
r = -EFAULT;
goto out;
}
chunk_fake[0].chunk_id = RADEON_CHUNK_ID_OLD;
chunk_fake[0].length_dw = cs->dwords;
chunk_fake[0].kdata = packets;
parser.dev = dev;
parser.file_priv = fpriv;
parser.num_chunks = 1;
parser.chunks = chunk_fake;
parser.ib_index = 0;
parser.reloc_index = -1;
/* get ib */
r = dev_priv->cs.ib_get(&parser);
if (r) {
goto out;
}
/* now parse command stream */
r = dev_priv->cs.parse(&parser);
if (r) {
goto out;
}
/* emit cs id sequence */
dev_priv->cs.id_emit(&parser, &cs_id);
COMMIT_RING();
cs->cs_id = cs_id;
out:
dev_priv->cs.ib_free(&parser);
drm_free(packets, size, DRM_MEM_DRIVER);
return r;
}
/* for non-mm */
static int radeon_nomm_relocate(struct drm_radeon_cs_parser *parser, uint32_t *reloc, uint32_t *offset)
{

View file

@ -513,8 +513,7 @@ typedef struct {
#define DRM_RADEON_GEM_SET_DOMAIN 0x23
#define DRM_RADEON_GEM_WAIT_RENDERING 0x24
#define DRM_RADEON_CS 0x25
#define DRM_RADEON_CS2 0x26
#define DRM_RADEON_CS 0x26
#define DRM_IOCTL_RADEON_CP_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
#define DRM_IOCTL_RADEON_CP_START DRM_IO( DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@ -554,8 +553,6 @@ typedef struct {
#define DRM_IOCTL_RADEON_GEM_SET_DOMAIN DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_GEM_SET_DOMAIN, struct drm_radeon_gem_set_domain)
#define DRM_IOCTL_RADEON_GEM_WAIT_RENDERING DRM_IOW(DRM_COMMAND_BASE + DRM_RADEON_GEM_WAIT_RENDERING, struct drm_radeon_gem_wait_rendering)
#define DRM_IOCTL_RADEON_CS DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS, struct drm_radeon_cs)
#define DRM_IOCTL_RADEON_CS2 DRM_IOWR(DRM_COMMAND_BASE + DRM_RADEON_CS2, struct drm_radeon_cs2)
typedef struct drm_radeon_init {
enum {
@ -870,16 +867,8 @@ struct drm_radeon_gem_pwrite {
/* New interface which obsolete all previous interface.
*/
struct drm_radeon_cs {
uint32_t dwords;
uint32_t cs_id;
uint64_t packets;
};
#define RADEON_CHUNK_ID_RELOCS 0x01
#define RADEON_CHUNK_ID_IB 0x02
#define RADEON_CHUNK_ID_OLD 0xff
struct drm_radeon_cs_chunk {
uint32_t chunk_id;
@ -887,7 +876,7 @@ struct drm_radeon_cs_chunk {
uint64_t chunk_data;
};
struct drm_radeon_cs2 {
struct drm_radeon_cs {
uint32_t num_chunks;
uint32_t cs_id;
uint64_t chunks; /* this points to uint64_t * which point to

View file

@ -1739,7 +1739,6 @@ extern int radeon_master_create(struct drm_device *dev, struct drm_master *maste
extern void radeon_master_destroy(struct drm_device *dev, struct drm_master *master);
extern void radeon_cp_dispatch_flip(struct drm_device * dev, struct drm_master *master);
extern int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv);
extern int radeon_cs2_ioctl(struct drm_device *dev, void *data, struct drm_file *fpriv);
extern int radeon_cs_init(struct drm_device *dev);
void radeon_gem_update_offsets(struct drm_device *dev, struct drm_master *master);
void radeon_init_memory_map(struct drm_device *dev);

View file

@ -3291,7 +3291,6 @@ struct drm_ioctl_desc radeon_ioctls[] = {
DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_RENDERING, radeon_gem_wait_rendering, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_CS2, radeon_cs2_ioctl, DRM_AUTH),
};
int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);