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Fix some randomness in activating a second channel on NV40 (odd GET/PUT vals). Ch 1 GET now advances, but no ctx_switch.

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Ben Skeggs 2006-10-14 06:57:49 +11:00
parent a9c6c3f21d
commit 4988074794
1 changed files with 8 additions and 0 deletions
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8
shared-core/nouveau_fifo.c
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@ -259,6 +259,10 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
#endif
}
/* disable the pusher ? */
NV_WRITE(NV_PFIFO_CACH1_DMAPSH, 0);
NV_WRITE(NV_PFIFO_CACH1_PSH0, 0);
/* enable the fifo dma operation */
NV_WRITE(NV_PFIFO_MODE,NV_READ(NV_PFIFO_MODE)|(1<<init->channel));
@ -274,6 +278,10 @@ static int nouveau_fifo_alloc(drm_device_t* dev,drm_nouveau_fifo_alloc_t* init,
NV_WRITE(NV03_FIFO_REGS_DMAPUT(init->channel), init->put_base);
NV_WRITE(NV03_FIFO_REGS_DMAGET(init->channel), init->put_base);
/* reenable the pusher ? */
NV_WRITE(NV_PFIFO_CACH1_PSH0, 1);
NV_WRITE(NV_PFIFO_CACH1_DMAPSH, 1);
/* reenable the fifo caches */
NV_WRITE(NV_PFIFO_CACHES, 0x00000001);