nv50: basic fbcon acceleration

This commit is contained in:
Ben Skeggs 2009-02-20 15:03:07 +10:00
parent 776d4fe697
commit 32a7de52a7
5 changed files with 290 additions and 2 deletions

View file

@ -40,7 +40,7 @@ nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
nv04_instmem.o nv50_instmem.o \
nouveau_bios.o \
nv50_crtc.o nv50_cursor.o nv50_lut.o nv50_sor.o nv50_dac.o nv50_connector.o nv50_i2c.o nv50_display.o \
nv50_fbcon.o
nv50_fbcon.o nv50_fbcon_accel.o
radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o radeon_gem.o \
radeon_buffer.o radeon_fence.o atom.o radeon_display.o radeon_atombios.o radeon_i2c.o radeon_connectors.o radeon_cs.o \
atombios_crtc.o radeon_encoders.o radeon_fb.o radeon_combios.o radeon_legacy_crtc.o radeon_legacy_encoders.o \

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@ -1 +0,0 @@
../shared-core/nouveau_dma.h

105
linux-core/nouveau_dma.h Normal file
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@ -0,0 +1,105 @@
/*
* Copyright (C) 2007 Ben Skeggs.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial
* portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
*/
#ifndef __NOUVEAU_DMA_H__
#define __NOUVEAU_DMA_H__
typedef enum {
NvSubM2MF = 0,
NvSub2D = 1
} nouveau_subchannel_id_t;
typedef enum {
NvM2MF = 0x80000001,
NvDmaFB = 0x80000002,
NvDmaTT = 0x80000003,
NvNotify0 = 0x80000004,
Nv2D = 0x80000005,
} nouveau_object_handle_t;
#define NV_MEMORY_TO_MEMORY_FORMAT 0x00000039
#define NV_MEMORY_TO_MEMORY_FORMAT_NAME 0x00000000
#define NV_MEMORY_TO_MEMORY_FORMAT_SET_REF 0x00000050
#define NV_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100
#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE 0x00000000
#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN 0x00000001
#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY 0x00000180
#define NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE 0x00000184
#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039
#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK200 0x00000200
#define NV50_MEMORY_TO_MEMORY_FORMAT_UNK21C 0x0000021c
#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238
#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c
static inline int
RING_SPACE(struct nouveau_channel *chan, int size)
{
if (chan->dma.free < size) {
int ret;
ret = nouveau_dma_wait(chan, size);
if (ret)
return ret;
}
chan->dma.free -= size;
return 0;
}
static inline void
OUT_RING(struct nouveau_channel *chan, int data)
{
chan->dma.pushbuf[chan->dma.cur++] = data;
}
static inline void
BEGIN_RING(struct nouveau_channel *chan, int subc, int mthd, int size)
{
OUT_RING(chan, (subc << 13) | (size << 18) | mthd);
}
static inline void
FIRE_RING(struct nouveau_channel *chan)
{
struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
if (chan->dma.cur == chan->dma.put)
return;
DRM_MEMORYBARRIER();
chan->dma.put = chan->dma.cur;
nv_wr32(chan->put, (chan->dma.put << 2) + chan->pushbuf_base);
}
/* This should allow easy switching to a real fifo in the future. */
#define OUT_MODE(mthd, val) do { \
nv50_display_command(dev_priv, mthd, val); \
} while(0)
#endif

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@ -577,6 +577,8 @@ int nv50_fbcon_init(struct drm_device *dev)
par->dev = dev;
par->fb = drm_fb;
nv50_fbcon_accel_init(info);
register_framebuffer(info);
DRM_INFO("nv50drmfb initialised\n");

View file

@ -35,6 +35,7 @@ struct nv50_fbcon_par {
int nv50_fbcon_init(struct drm_device *dev);
int nv50_fbcon_destroy(struct drm_device *dev);
int nv50_fbcon_accel_init(struct fb_info *info);
#endif /* __NV50_FBCON_H__ */

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@ -0,0 +1,181 @@
#include "drmP.h"
#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nv50_fbcon.h"
static int
nv50_fbcon_sync(struct fb_info *info)
{
if (info->state != FBINFO_STATE_RUNNING)
return 0;
return 0;
}
static void
nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
{
struct nv50_fbcon_par *par = info->par;
struct drm_nouveau_private *dev_priv = par->dev->dev_private;
struct nouveau_channel *chan = dev_priv->channel;
if (info->state != FBINFO_STATE_RUNNING)
return;
if (info->flags & FBINFO_HWACCEL_DISABLED) {
cfb_fillrect(info, rect);
return;
}
if (RING_SPACE(chan, 9)) {
DRM_ERROR("GPU lockup - switching to software fbcon\n");
info->flags |= FBINFO_HWACCEL_DISABLED;
cfb_fillrect(info, rect);
return;
}
BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
OUT_RING (chan, rect->rop == ROP_COPY ? 3 : 1);
BEGIN_RING(chan, NvSub2D, 0x0588, 1);
OUT_RING (chan, rect->color);
BEGIN_RING(chan, NvSub2D, 0x0600, 4);
OUT_RING (chan, rect->dx);
OUT_RING (chan, rect->dy);
OUT_RING (chan, rect->dx + rect->width);
OUT_RING (chan, rect->dy + rect->height);
FIRE_RING (chan);
}
static void
nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
{
struct nv50_fbcon_par *par = info->par;
struct drm_nouveau_private *dev_priv = par->dev->dev_private;
struct nouveau_channel *chan = dev_priv->channel;
if (info->state != FBINFO_STATE_RUNNING)
return;
if (info->flags & FBINFO_HWACCEL_DISABLED) {
cfb_copyarea(info, region);
return;
}
if (RING_SPACE(chan, 17)) {
DRM_ERROR("GPU lockup - switching to software fbcon\n");
info->flags |= FBINFO_HWACCEL_DISABLED;
cfb_copyarea(info, region);
return;
}
BEGIN_RING(chan, NvSub2D, 0x02ac, 1);
OUT_RING (chan, 3);
BEGIN_RING(chan, NvSub2D, 0x0110, 1);
OUT_RING (chan, 0);
BEGIN_RING(chan, NvSub2D, 0x08b0, 12);
OUT_RING (chan, region->dx);
OUT_RING (chan, region->dy);
OUT_RING (chan, region->width);
OUT_RING (chan, region->height);
OUT_RING (chan, 0);
OUT_RING (chan, 1);
OUT_RING (chan, 0);
OUT_RING (chan, 1);
OUT_RING (chan, 0);
OUT_RING (chan, region->sx);
OUT_RING (chan, 0);
OUT_RING (chan, region->sy);
FIRE_RING (chan);
}
static void
nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
{
if (info->state != FBINFO_STATE_RUNNING)
return;
if (info->flags & FBINFO_HWACCEL_DISABLED) {
cfb_imageblit(info, image);
return;
}
cfb_imageblit(info, image);
}
int
nv50_fbcon_accel_init(struct fb_info *info)
{
struct nv50_fbcon_par *par = info->par;
struct drm_device *dev = par->dev;
struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_channel *chan = dev_priv->channel;
struct nouveau_gpuobj *eng2d = NULL;
int ret, format;
switch (info->var.bits_per_pixel) {
case 16:
format = 0xe8;
break;
default:
format = 0xe6;
break;
}
ret = nouveau_gpuobj_gr_new(dev_priv->channel, 0x502d, &eng2d);
if (ret)
return ret;
ret = nouveau_gpuobj_ref_add(dev, dev_priv->channel, Nv2D, eng2d, NULL);
if (ret)
return ret;
ret = RING_SPACE(chan, 34);
if (ret) {
DRM_ERROR("GPU lockup - switching to software fbcon\n");
return ret;
}
BEGIN_RING(chan, NvSub2D, 0x0000, 1);
OUT_RING (chan, Nv2D);
BEGIN_RING(chan, NvSub2D, 0x0180, 4);
OUT_RING (chan, NvNotify0);
OUT_RING (chan, chan->vram_handle);
OUT_RING (chan, chan->vram_handle);
OUT_RING (chan, chan->vram_handle);
BEGIN_RING(chan, NvSub2D, 0x0290, 1);
OUT_RING (chan, 0);
BEGIN_RING(chan, NvSub2D, 0x0888, 1);
OUT_RING (chan, 1);
BEGIN_RING(chan, NvSub2D, 0x02a0, 1);
OUT_RING (chan, 0x55);
BEGIN_RING(chan, NvSub2D, 0x0580, 2);
OUT_RING (chan, 4);
OUT_RING (chan, format);
BEGIN_RING(chan, NvSub2D, 0x0200, 2);
OUT_RING (chan, format);
OUT_RING (chan, 1);
BEGIN_RING(chan, NvSub2D, 0x0214, 5);
OUT_RING (chan, info->fix.line_length);
OUT_RING (chan, info->var.xres_virtual);
OUT_RING (chan, info->var.yres_virtual);
OUT_RING (chan, 0);
OUT_RING (chan, info->fix.smem_start - dev_priv->fb_phys);
BEGIN_RING(chan, NvSub2D, 0x0230, 2);
OUT_RING (chan, format);
OUT_RING (chan, 1);
BEGIN_RING(chan, NvSub2D, 0x0244, 5);
OUT_RING (chan, info->fix.line_length);
OUT_RING (chan, info->var.xres_virtual);
OUT_RING (chan, info->var.yres_virtual);
OUT_RING (chan, 0);
OUT_RING (chan, info->fix.smem_start - dev_priv->fb_phys);
info->fbops->fb_fillrect = nv50_fbcon_fillrect;
info->fbops->fb_copyarea = nv50_fbcon_copyarea;
info->fbops->fb_imageblit = nv50_fbcon_imageblit;
info->fbops->fb_sync = nv50_fbcon_sync;
return 0;
}