mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2026-05-16 19:08:10 +02:00
- Cleanup of indirect buffer submission.
- Indexed vertex buffer fixes, more robust handling of indirect buffers for
the elt path.
This commit is contained in:
parent
81f4398ed7
commit
2a39d83ffe
4 changed files with 42 additions and 50 deletions
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@ -37,7 +37,7 @@
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#define R128_NAME "r128"
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#define R128_DESC "ATI Rage 128"
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#define R128_DATE "20001106"
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#define R128_DATE "20001115"
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#define R128_MAJOR 2
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#define R128_MINOR 0
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#define R128_PATCHLEVEL 0
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@ -666,6 +666,10 @@ int r128_cce_idle( struct inode *inode, struct file *filp,
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return -EINVAL;
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}
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if ( dev_priv->cce_running ) {
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r128_do_cce_flush( dev_priv );
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}
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return r128_do_cce_idle( dev_priv );
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}
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@ -37,7 +37,7 @@
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#define R128_NAME "r128"
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#define R128_DESC "ATI Rage 128"
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#define R128_DATE "20001106"
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#define R128_DATE "20001115"
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#define R128_MAJOR 2
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#define R128_MINOR 0
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#define R128_PATCHLEVEL 0
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@ -272,9 +272,7 @@ static inline void r128_emit_state( drm_r128_private_t *dev_priv )
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/* Turn off the texture cache flushing */
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sarea_priv->context_state.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH;
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sarea_priv->dirty &= ~(R128_UPLOAD_TEX0IMAGES |
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R128_UPLOAD_TEX1IMAGES |
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R128_REQUIRE_QUIESCENCE);
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sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE;
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}
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@ -350,18 +348,18 @@ static void r128_cce_performance_boxes( drm_r128_private_t *dev_priv )
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static void r128_print_dirty( const char *msg, unsigned int flags )
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{
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DRM_DEBUG( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
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msg,
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flags,
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(flags & R128_UPLOAD_CORE) ? "core, " : "",
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(flags & R128_UPLOAD_CONTEXT) ? "context, " : "",
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(flags & R128_UPLOAD_SETUP) ? "setup, " : "",
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(flags & R128_UPLOAD_TEX0) ? "tex0, " : "",
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(flags & R128_UPLOAD_TEX1) ? "tex1, " : "",
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(flags & R128_UPLOAD_MASKS) ? "masks, " : "",
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(flags & R128_UPLOAD_WINDOW) ? "window, " : "",
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(flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
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(flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
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DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
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msg,
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flags,
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(flags & R128_UPLOAD_CORE) ? "core, " : "",
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(flags & R128_UPLOAD_CONTEXT) ? "context, " : "",
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(flags & R128_UPLOAD_SETUP) ? "setup, " : "",
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(flags & R128_UPLOAD_TEX0) ? "tex0, " : "",
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(flags & R128_UPLOAD_TEX1) ? "tex1, " : "",
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(flags & R128_UPLOAD_MASKS) ? "masks, " : "",
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(flags & R128_UPLOAD_WINDOW) ? "window, " : "",
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(flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
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(flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
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}
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static void r128_cce_dispatch_clear( drm_device_t *dev,
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@ -687,13 +685,8 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
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int prim = buf_priv->prim;
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int i = 0;
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RING_LOCALS;
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DRM_DEBUG( "%s\n", __FUNCTION__ );
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DRM_DEBUG( "vertex buffer index = %d\n", index );
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DRM_DEBUG( "vertex buffer offset = 0x%x\n", offset );
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DRM_DEBUG( "vertex buffer size = %d vertices\n", size );
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DRM_DEBUG( "vertex size = %d\n", vertsize );
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DRM_DEBUG( "vertex format = 0x%x\n", format );
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DRM_DEBUG( "%s: buf=%d nbox=%d\n",
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__FUNCTION__, buf->idx, sarea_priv->nbox );
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r128_update_ring_snapshot( dev_priv );
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@ -743,7 +736,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
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ADVANCE_RING();
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buf->pending = 1;
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buf->used = 0;
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/* FIXME: Check dispatched field */
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buf_priv->dispatched = 0;
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}
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@ -833,6 +826,7 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
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ADVANCE_RING();
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buf->pending = 1;
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buf->used = 0;
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/* FIXME: Check dispatched field */
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buf_priv->dispatched = 0;
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}
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@ -851,24 +845,20 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
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static void r128_cce_dispatch_indices( drm_device_t *dev,
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drm_buf_t *buf,
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int start, int end )
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int start, int end,
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int count )
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{
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drm_r128_private_t *dev_priv = dev->dev_private;
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drm_r128_buf_priv_t *buf_priv = buf->dev_private;
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drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
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int vertsize = sarea_priv->vertsize;
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int format = sarea_priv->vc_format;
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int index = buf->idx;
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int offset = dev_priv->buffers->offset - dev->agp->base;
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int prim = buf_priv->prim;
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u32 *data;
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int dwords;
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int i = 0;
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RING_LOCALS;
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DRM_DEBUG( "%s: start=%d end=%d\n", __FUNCTION__, start, end );
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DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count );
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r128_update_ring_snapshot( dev_priv );
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@ -882,9 +872,6 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
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r128_emit_state( dev_priv );
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}
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/* Adjust start offset to include packet header
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*/
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start -= R128_INDEX_PRIM_OFFSET;
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dwords = (end - start + 3) / sizeof(u32);
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data = (u32 *)((char *)dev_priv->buffers->handle
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@ -896,21 +883,12 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
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data[2] = R128_MAX_VB_VERTS;
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data[3] = format;
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data[4] = (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
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(R128_MAX_VB_VERTS << 16));
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(count << 16));
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if ( (end - start) & 0x3 ) {
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if ( count & 0x1 ) {
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data[dwords-1] &= 0x0000ffff;
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}
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if ( 0 ) {
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int i;
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DRM_INFO( "data = %p\n", data );
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for ( i = 0 ; i < dwords ; i++ ) {
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DRM_INFO( "data[0x%x] = 0x%08x\n",
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i, data[i] );
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}
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}
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do {
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/* Emit the next set of up to three cliprects */
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if ( i < sarea_priv->nbox ) {
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@ -1204,6 +1182,7 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
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drm_buf_t *buf;
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drm_r128_buf_priv_t *buf_priv;
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drm_r128_indices_t elts;
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int count;
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if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) ||
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dev->lock.pid != current->pid ) {
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@ -1219,7 +1198,7 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
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sizeof(elts) ) )
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return -EFAULT;
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DRM_DEBUG( "%s: pid=%d index=%d start=%d end=%d discard=%d\n",
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DRM_DEBUG( "%s: pid=%d buf=%d s=%d e=%d d=%d\n",
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__FUNCTION__, current->pid,
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elts.idx, elts.start, elts.end, elts.discard );
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@ -1246,15 +1225,24 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
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DRM_ERROR( "sending pending buffer %d\n", elts.idx );
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return -EINVAL;
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}
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if ( (buf->offset + elts.start) & 0x3 ) {
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DRM_ERROR( "buffer start 0x%x\n", buf->offset + elts.start );
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count = (elts.end - elts.start) / sizeof(u16);
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elts.start -= R128_INDEX_PRIM_OFFSET;
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if ( elts.start & 0x7 ) {
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DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
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return -EINVAL;
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}
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if ( elts.start < buf->used ) {
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DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
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return -EINVAL;
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}
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buf->used = elts.end;
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buf_priv->prim = elts.prim;
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buf_priv->discard = elts.discard;
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r128_cce_dispatch_indices( dev, buf, elts.start, elts.end );
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r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count );
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return 0;
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}
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