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Commit os-independence of r128. Only hooked up on FreeBSD until I can fix

Browse source 
my r128 system to test it.
This commit is contained in:
Eric Anholt 2002-06-19 04:12:51 +00:00
parent ffc8dc1491
commit 13e1d6a341
18 changed files with 759 additions and 4251 deletions
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19
bsd-core/drm_os_freebsd.h
View file

@ -100,6 +100,10 @@
#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) )
#define DRM_OS_VTOPHYS(addr) vtophys(addr)
#define DRM_OS_READ8(addr) *((volatile char *)(addr))
#define DRM_OS_READ32(addr) *((volatile long *)(addr))
#define DRM_OS_WRITE8(addr, val) *((volatile char *)(addr)) = (val)
#define DRM_OS_WRITE32(addr, val) *((volatile long *)(addr)) = (val)
#define DRM_OS_PRIV \
drm_file_t *priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
@ -118,6 +122,19 @@ do { \
while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
} while (0)
#define DRM_OS_GETSAREA() \
do { \
drm_map_list_entry_t *listentry; \
TAILQ_FOREACH(listentry, dev->maplist, link) { \
drm_map_t *map = listentry->map; \
if (map->type == _DRM_SHM && \
map->flags & _DRM_CONTAINS_LOCK) { \
dev_priv->sarea = map; \
break; \
} \
} \
} while (0)
#define DRM_OS_RETURN(v) return v;
#define DRM_OS_ERR(v) v
@ -160,6 +177,8 @@ typedef struct drm_chipinfo
char *name;
} drm_chipinfo_t;
#define cpu_to_le32(x) (x)
typedef u_int32_t dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;

19
bsd-core/drm_os_netbsd.h
View file

@ -64,6 +64,10 @@
#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) )
#define DRM_OS_VTOPHYS(addr) vtophys(addr)
#define DRM_OS_READ8(addr) *((volatile char *)(addr))
#define DRM_OS_READ32(addr) *((volatile long *)(addr))
#define DRM_OS_WRITE8(addr, val) *((volatile char *)(addr)) = (val)
#define DRM_OS_WRITE32(addr, val) *((volatile long *)(addr)) = (val)
#define DRM_OS_PRIV \
drm_file_t *priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
@ -82,6 +86,19 @@ do { \
while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
} while (0)
#define DRM_OS_GETSAREA() \
do { \
drm_map_list_entry_t *listentry; \
TAILQ_FOREACH(listentry, dev->maplist, link) { \
drm_map_t *map = listentry->map; \
if (map->type == _DRM_SHM && \
map->flags & _DRM_CONTAINS_LOCK) { \
dev_priv->sarea = map; \
break; \
} \
} \
} while (0)
#define DRM_OS_RETURN(v) return v;
#define DRM_OS_ERR(v) v
@ -119,6 +136,8 @@ typedef struct drm_chipinfo
char *name;
} drm_chipinfo_t;
#define cpu_to_le32(x) (x)
typedef u_int32_t dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;

7
bsd/Imakefile
View file

@ -1,3 +1,4 @@
XCOMM $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/Imakefile,v 1.8 2001/12/13 00:24:45 alanh Exp $
XCOMM This is a kludge until we determine how best to build the
@ -18,3 +19,9 @@ all::
clean::
$(MAKE) -f Makefile.bsd clean
LinkSourceFile(r128.h,$(XF86OSSRC)/shared/drm/kernel)
LinkSourceFile(r128_cce.c,$(XF86OSSRC)/shared/drm/kernel)
LinkSourceFile(r128_drm.h,$(XF86OSSRC)/shared/drm/kernel)
LinkSourceFile(r128_drv.h,$(XF86OSSRC)/shared/drm/kernel)
LinkSourceFile(r128_state.c,$(XF86OSSRC)/shared/drm/kernel)

19
bsd/drm_os_freebsd.h
View file

@ -100,6 +100,10 @@
#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) )
#define DRM_OS_VTOPHYS(addr) vtophys(addr)
#define DRM_OS_READ8(addr) *((volatile char *)(addr))
#define DRM_OS_READ32(addr) *((volatile long *)(addr))
#define DRM_OS_WRITE8(addr, val) *((volatile char *)(addr)) = (val)
#define DRM_OS_WRITE32(addr, val) *((volatile long *)(addr)) = (val)
#define DRM_OS_PRIV \
drm_file_t *priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
@ -118,6 +122,19 @@ do { \
while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
} while (0)
#define DRM_OS_GETSAREA() \
do { \
drm_map_list_entry_t *listentry; \
TAILQ_FOREACH(listentry, dev->maplist, link) { \
drm_map_t *map = listentry->map; \
if (map->type == _DRM_SHM && \
map->flags & _DRM_CONTAINS_LOCK) { \
dev_priv->sarea = map; \
break; \
} \
} \
} while (0)
#define DRM_OS_RETURN(v) return v;
#define DRM_OS_ERR(v) v
@ -160,6 +177,8 @@ typedef struct drm_chipinfo
char *name;
} drm_chipinfo_t;
#define cpu_to_le32(x) (x)
typedef u_int32_t dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;

19
bsd/drm_os_netbsd.h
View file

@ -64,6 +64,10 @@
#define DRM_OS_MALLOC(size) malloc( size, DRM(M_DRM), M_NOWAIT )
#define DRM_OS_FREE(pt) free( pt, DRM(M_DRM) )
#define DRM_OS_VTOPHYS(addr) vtophys(addr)
#define DRM_OS_READ8(addr) *((volatile char *)(addr))
#define DRM_OS_READ32(addr) *((volatile long *)(addr))
#define DRM_OS_WRITE8(addr, val) *((volatile char *)(addr)) = (val)
#define DRM_OS_WRITE32(addr, val) *((volatile long *)(addr)) = (val)
#define DRM_OS_PRIV \
drm_file_t *priv = (drm_file_t *) DRM(find_file_by_proc)(dev, p); \
@ -82,6 +86,19 @@ do { \
while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
} while (0)
#define DRM_OS_GETSAREA() \
do { \
drm_map_list_entry_t *listentry; \
TAILQ_FOREACH(listentry, dev->maplist, link) { \
drm_map_t *map = listentry->map; \
if (map->type == _DRM_SHM && \
map->flags & _DRM_CONTAINS_LOCK) { \
dev_priv->sarea = map; \
break; \
} \
} \
} while (0)
#define DRM_OS_RETURN(v) return v;
#define DRM_OS_ERR(v) v
@ -119,6 +136,8 @@ typedef struct drm_chipinfo
char *name;
} drm_chipinfo_t;
#define cpu_to_le32(x) (x)
typedef u_int32_t dma_addr_t;
typedef u_int32_t atomic_t;
typedef u_int32_t cycles_t;

81
bsd/r128.h
View file

@ -1,81 +0,0 @@
/* r128.h -- ATI Rage 128 DRM template customization -*- linux-c -*-
* Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com
*
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
*/
#ifndef __R128_H__
#define __R128_H__
/* This remains constant for all DRM template files.
*/
#define DRM(x) r128_##x
/* General customization:
*/
#define __HAVE_AGP 1
#define __MUST_HAVE_AGP 0
#define __HAVE_MTRR 1
#define __HAVE_CTX_BITMAP 1
#define __HAVE_SG 1
#define __HAVE_PCI_DMA 1
/* Driver customization:
*/
#define DRIVER_PRERELEASE() do { \
if ( dev->dev_private ) { \
drm_r128_private_t *dev_priv = dev->dev_private; \
if ( dev_priv->page_flipping ) { \
r128_do_cleanup_pageflip( dev ); \
} \
} \
} while (0)
#define DRIVER_PRETAKEDOWN() do { \
if ( dev->dev_private ) r128_do_cleanup_cce( dev ); \
} while (0)
/* DMA customization:
*/
#define __HAVE_DMA 1
#if 0
/* GH: Remove this for now... */
#define __HAVE_DMA_QUIESCENT 1
#define DRIVER_DMA_QUIESCENT() do { \
drm_r128_private_t *dev_priv = dev->dev_private; \
return r128_do_cce_idle( dev_priv ); \
} while (0)
#endif
/* Buffer customization:
*/
#define DRIVER_BUF_PRIV_T drm_r128_buf_priv_t
#define DRIVER_AGP_BUFFERS_MAP( dev ) \
((drm_r128_private_t *)((dev)->dev_private))->buffers
#endif

1023
bsd/r128_cce.c
View file

File diff suppressed because it is too large Load diff

308
bsd/r128_drm.h
View file

@ -1,308 +0,0 @@
/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
* Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
*
* Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Gareth Hughes <gareth@valinux.com>
* Kevin E. Martin <martin@valinux.com>
*/
#ifndef __R128_DRM_H__
#define __R128_DRM_H__
/* WARNING: If you change any of these defines, make sure to change the
* defines in the X server file (r128_sarea.h)
*/
#ifndef __R128_SAREA_DEFINES__
#define __R128_SAREA_DEFINES__
/* What needs to be changed for the current vertex buffer?
*/
#define R128_UPLOAD_CONTEXT 0x001
#define R128_UPLOAD_SETUP 0x002
#define R128_UPLOAD_TEX0 0x004
#define R128_UPLOAD_TEX1 0x008
#define R128_UPLOAD_TEX0IMAGES 0x010
#define R128_UPLOAD_TEX1IMAGES 0x020
#define R128_UPLOAD_CORE 0x040
#define R128_UPLOAD_MASKS 0x080
#define R128_UPLOAD_WINDOW 0x100
#define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
#define R128_REQUIRE_QUIESCENCE 0x400
#define R128_UPLOAD_ALL 0x7ff
#define R128_FRONT 0x1
#define R128_BACK 0x2
#define R128_DEPTH 0x4
/* Primitive types
*/
#define R128_POINTS 0x1
#define R128_LINES 0x2
#define R128_LINE_STRIP 0x3
#define R128_TRIANGLES 0x4
#define R128_TRIANGLE_FAN 0x5
#define R128_TRIANGLE_STRIP 0x6
/* Vertex/indirect buffer size
*/
#define R128_BUFFER_SIZE 16384
/* Byte offsets for indirect buffer data
*/
#define R128_INDEX_PRIM_OFFSET 20
#define R128_HOSTDATA_BLIT_OFFSET 32
/* Keep these small for testing.
*/
#define R128_NR_SAREA_CLIPRECTS 12
/* There are 2 heaps (local/AGP). Each region within a heap is a
* minimum of 64k, and there are at most 64 of them per heap.
*/
#define R128_LOCAL_TEX_HEAP 0
#define R128_AGP_TEX_HEAP 1
#define R128_NR_TEX_HEAPS 2
#define R128_NR_TEX_REGIONS 64
#define R128_LOG_TEX_GRANULARITY 16
#define R128_NR_CONTEXT_REGS 12
#define R128_MAX_TEXTURE_LEVELS 11
#define R128_MAX_TEXTURE_UNITS 2
#endif /* __R128_SAREA_DEFINES__ */
typedef struct {
/* Context state - can be written in one large chunk */
unsigned int dst_pitch_offset_c;
unsigned int dp_gui_master_cntl_c;
unsigned int sc_top_left_c;
unsigned int sc_bottom_right_c;
unsigned int z_offset_c;
unsigned int z_pitch_c;
unsigned int z_sten_cntl_c;
unsigned int tex_cntl_c;
unsigned int misc_3d_state_cntl_reg;
unsigned int texture_clr_cmp_clr_c;
unsigned int texture_clr_cmp_msk_c;
unsigned int fog_color_c;
/* Texture state */
unsigned int tex_size_pitch_c;
unsigned int constant_color_c;
/* Setup state */
unsigned int pm4_vc_fpu_setup;
unsigned int setup_cntl;
/* Mask state */
unsigned int dp_write_mask;
unsigned int sten_ref_mask_c;
unsigned int plane_3d_mask_c;
/* Window state */
unsigned int window_xy_offset;
/* Core state */
unsigned int scale_3d_cntl;
} drm_r128_context_regs_t;
/* Setup registers for each texture unit
*/
typedef struct {
unsigned int tex_cntl;
unsigned int tex_combine_cntl;
unsigned int tex_size_pitch;
unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
unsigned int tex_border_color;
} drm_r128_texture_regs_t;
typedef struct drm_r128_sarea {
/* The channel for communication of state information to the kernel
* on firing a vertex buffer.
*/
drm_r128_context_regs_t context_state;
drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
unsigned int dirty;
unsigned int vertsize;
unsigned int vc_format;
/* The current cliprects, or a subset thereof.
*/
drm_clip_rect_t boxes[R128_NR_SAREA_CLIPRECTS];
unsigned int nbox;
/* Counters for client-side throttling of rendering clients.
*/
unsigned int last_frame;
unsigned int last_dispatch;
drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
int tex_age[R128_NR_TEX_HEAPS];
int ctx_owner;
} drm_r128_sarea_t;
/* WARNING: If you change any of these defines, make sure to change the
* defines in the Xserver file (xf86drmR128.h)
*/
/* Rage 128 specific ioctls
* The device specific ioctl range is 0x40 to 0x79.
*/
#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t)
#define DRM_IOCTL_R128_CCE_START DRM_IO( 0x41)
#define DRM_IOCTL_R128_CCE_STOP DRM_IOW( 0x42, drm_r128_cce_stop_t)
#define DRM_IOCTL_R128_CCE_RESET DRM_IO( 0x43)
#define DRM_IOCTL_R128_CCE_IDLE DRM_IO( 0x44)
#define DRM_IOCTL_R128_RESET DRM_IO( 0x46)
#define DRM_IOCTL_R128_SWAP DRM_IO( 0x47)
#define DRM_IOCTL_R128_CLEAR DRM_IOW( 0x48, drm_r128_clear_t)
#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x49, drm_r128_vertex_t)
#define DRM_IOCTL_R128_INDICES DRM_IOW( 0x4a, drm_r128_indices_t)
#define DRM_IOCTL_R128_BLIT DRM_IOW( 0x4b, drm_r128_blit_t)
#define DRM_IOCTL_R128_DEPTH DRM_IOW( 0x4c, drm_r128_depth_t)
#define DRM_IOCTL_R128_STIPPLE DRM_IOW( 0x4d, drm_r128_stipple_t)
#define DRM_IOCTL_R128_INDIRECT DRM_IOWR(0x4f, drm_r128_indirect_t)
#define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( 0x50, drm_r128_fullscreen_t)
#define DRM_IOCTL_R128_CLEAR2 DRM_IOW( 0x51, drm_r128_clear2_t)
typedef struct drm_r128_init {
enum {
R128_INIT_CCE = 0x01,
R128_CLEANUP_CCE = 0x02
} func;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int sarea_priv_offset;
#else
unsigned long sarea_priv_offset;
#endif
int is_pci;
int cce_mode;
int cce_secure;
int ring_size;
int usec_timeout;
unsigned int fb_bpp;
unsigned int front_offset, front_pitch;
unsigned int back_offset, back_pitch;
unsigned int depth_bpp;
unsigned int depth_offset, depth_pitch;
unsigned int span_offset;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
unsigned int fb_offset;
unsigned int mmio_offset;
unsigned int ring_offset;
unsigned int ring_rptr_offset;
unsigned int buffers_offset;
unsigned int agp_textures_offset;
#else
unsigned long fb_offset;
unsigned long mmio_offset;
unsigned long ring_offset;
unsigned long ring_rptr_offset;
unsigned long buffers_offset;
unsigned long agp_textures_offset;
#endif
} drm_r128_init_t;
typedef struct drm_r128_cce_stop {
int flush;
int idle;
} drm_r128_cce_stop_t;
typedef struct drm_r128_clear {
unsigned int flags;
#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
int x, y, w, h;
#endif
unsigned int clear_color;
unsigned int clear_depth;
#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
unsigned int color_mask;
unsigned int depth_mask;
#endif
} drm_r128_clear_t;
typedef struct drm_r128_vertex {
int prim;
int idx; /* Index of vertex buffer */
int count; /* Number of vertices in buffer */
int discard; /* Client finished with buffer? */
} drm_r128_vertex_t;
typedef struct drm_r128_indices {
int prim;
int idx;
int start;
int end;
int discard; /* Client finished with buffer? */
} drm_r128_indices_t;
typedef struct drm_r128_blit {
int idx;
int pitch;
int offset;
int format;
unsigned short x, y;
unsigned short width, height;
} drm_r128_blit_t;
typedef struct drm_r128_depth {
enum {
R128_WRITE_SPAN = 0x01,
R128_WRITE_PIXELS = 0x02,
R128_READ_SPAN = 0x03,
R128_READ_PIXELS = 0x04
} func;
int n;
int *x;
int *y;
unsigned int *buffer;
unsigned char *mask;
} drm_r128_depth_t;
typedef struct drm_r128_stipple {
unsigned int *mask;
} drm_r128_stipple_t;
typedef struct drm_r128_indirect {
int idx;
int start;
int end;
int discard;
} drm_r128_indirect_t;
typedef struct drm_r128_fullscreen {
enum {
R128_INIT_FULLSCREEN = 0x01,
R128_CLEANUP_FULLSCREEN = 0x02
} func;
} drm_r128_fullscreen_t;
#endif

545
bsd/r128_drv.h
View file

@ -1,545 +0,0 @@
/* r128_drv.h -- Private header for r128 driver -*- linux-c -*-
* Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com
*
* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
* All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*
* Authors:
* Rickard E. (Rik) Faith <faith@valinux.com>
* Kevin E. Martin <martin@valinux.com>
* Gareth Hughes <gareth@valinux.com>
* Michel Dänzer <daenzerm@student.ethz.ch>
*/
#include <machine/endian.h>
#if BYTE_ORDER==LITTLE_ENDIAN
#define le32_to_cpu(x) x
#define cpu_to_le32(x) x
#else
#define le32_to_cpu(x) ntohl(x)
#define cpu_to_le32(x) htonl(x)
#endif
#ifndef __R128_DRV_H__
#define __R128_DRV_H__
#define GET_RING_HEAD( ring ) le32_to_cpu( *(ring)->head )
#define SET_RING_HEAD( ring, val ) *(ring)->head = cpu_to_le32( val )
typedef struct drm_r128_freelist {
unsigned int age;
drm_buf_t *buf;
struct drm_r128_freelist *next;
struct drm_r128_freelist *prev;
} drm_r128_freelist_t;
typedef struct drm_r128_ring_buffer {
u32 *start;
u32 *end;
int size;
int size_l2qw;
volatile u32 *head;
u32 tail;
u32 tail_mask;
int space;
int high_mark;
} drm_r128_ring_buffer_t;
typedef struct drm_r128_private {
drm_r128_ring_buffer_t ring;
drm_r128_sarea_t *sarea_priv;
int cce_mode;
int cce_fifo_size;
int cce_running;
drm_r128_freelist_t *head;
drm_r128_freelist_t *tail;
int usec_timeout;
int is_pci;
unsigned long phys_pci_gart;
#if __REALLY_HAVE_SG
dma_addr_t bus_pci_gart;
#endif
unsigned long cce_buffers_offset;
atomic_t idle_count;
int page_flipping;
int current_page;
u32 crtc_offset;
u32 crtc_offset_cntl;
u32 color_fmt;
unsigned int front_offset;
unsigned int front_pitch;
unsigned int back_offset;
unsigned int back_pitch;
u32 depth_fmt;
unsigned int depth_offset;
unsigned int depth_pitch;
unsigned int span_offset;
u32 front_pitch_offset_c;
u32 back_pitch_offset_c;
u32 depth_pitch_offset_c;
u32 span_pitch_offset_c;
drm_map_t *sarea;
drm_map_t *fb;
drm_map_t *mmio;
drm_map_t *cce_ring;
drm_map_t *ring_rptr;
drm_map_t *buffers;
drm_map_t *agp_textures;
} drm_r128_private_t;
typedef struct drm_r128_buf_priv {
u32 age;
int prim;
int discard;
int dispatched;
drm_r128_freelist_t *list_entry;
} drm_r128_buf_priv_t;
/* r128_cce.c */
extern int r128_cce_init( DRM_OS_IOCTL );
extern int r128_cce_start( DRM_OS_IOCTL );
extern int r128_cce_stop( DRM_OS_IOCTL );
extern int r128_cce_reset( DRM_OS_IOCTL );
extern int r128_cce_idle( DRM_OS_IOCTL );
extern int r128_engine_reset( DRM_OS_IOCTL );
extern int r128_fullscreen( DRM_OS_IOCTL );
extern int r128_cce_buffers( DRM_OS_IOCTL );
extern void r128_freelist_reset( drm_device_t *dev );
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
static __inline__ void
r128_update_ring_snapshot( drm_r128_ring_buffer_t *ring )
{
ring->space = (GET_RING_HEAD( ring ) - ring->tail) * sizeof(u32);
if ( ring->space <= 0 )
ring->space += ring->size;
}
extern int r128_do_cce_idle( drm_r128_private_t *dev_priv );
extern int r128_do_cleanup_cce( drm_device_t *dev );
extern int r128_do_cleanup_pageflip( drm_device_t *dev );
/* r128_state.c */
extern int r128_cce_clear( DRM_OS_IOCTL );
extern int r128_cce_swap( DRM_OS_IOCTL );
extern int r128_cce_vertex( DRM_OS_IOCTL );
extern int r128_cce_indices( DRM_OS_IOCTL );
extern int r128_cce_blit( DRM_OS_IOCTL );
extern int r128_cce_depth( DRM_OS_IOCTL );
extern int r128_cce_stipple( DRM_OS_IOCTL );
extern int r128_cce_indirect( DRM_OS_IOCTL );
/* Register definitions, register access macros and drmAddMap constants
* for Rage 128 kernel driver.
*/
#define R128_AUX_SC_CNTL 0x1660
# define R128_AUX1_SC_EN (1 << 0)
# define R128_AUX1_SC_MODE_OR (0 << 1)
# define R128_AUX1_SC_MODE_NAND (1 << 1)
# define R128_AUX2_SC_EN (1 << 2)
# define R128_AUX2_SC_MODE_OR (0 << 3)
# define R128_AUX2_SC_MODE_NAND (1 << 3)
# define R128_AUX3_SC_EN (1 << 4)
# define R128_AUX3_SC_MODE_OR (0 << 5)
# define R128_AUX3_SC_MODE_NAND (1 << 5)
#define R128_AUX1_SC_LEFT 0x1664
#define R128_AUX1_SC_RIGHT 0x1668
#define R128_AUX1_SC_TOP 0x166c
#define R128_AUX1_SC_BOTTOM 0x1670
#define R128_AUX2_SC_LEFT 0x1674
#define R128_AUX2_SC_RIGHT 0x1678
#define R128_AUX2_SC_TOP 0x167c
#define R128_AUX2_SC_BOTTOM 0x1680
#define R128_AUX3_SC_LEFT 0x1684
#define R128_AUX3_SC_RIGHT 0x1688
#define R128_AUX3_SC_TOP 0x168c
#define R128_AUX3_SC_BOTTOM 0x1690
#define R128_BRUSH_DATA0 0x1480
#define R128_BUS_CNTL 0x0030
# define R128_BUS_MASTER_DIS (1 << 6)
#define R128_CLOCK_CNTL_INDEX 0x0008
#define R128_CLOCK_CNTL_DATA 0x000c
# define R128_PLL_WR_EN (1 << 7)
#define R128_CONSTANT_COLOR_C 0x1d34
#define R128_CRTC_OFFSET 0x0224
#define R128_CRTC_OFFSET_CNTL 0x0228
# define R128_CRTC_OFFSET_FLIP_CNTL (1 << 16)
#define R128_DP_GUI_MASTER_CNTL 0x146c
# define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0)
# define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1)
# define R128_GMC_BRUSH_SOLID_COLOR (13 << 4)
# define R128_GMC_BRUSH_NONE (15 << 4)
# define R128_GMC_DST_16BPP (4 << 8)
# define R128_GMC_DST_24BPP (5 << 8)
# define R128_GMC_DST_32BPP (6 << 8)
# define R128_GMC_DST_DATATYPE_SHIFT 8
# define R128_GMC_SRC_DATATYPE_COLOR (3 << 12)
# define R128_DP_SRC_SOURCE_MEMORY (2 << 24)
# define R128_DP_SRC_SOURCE_HOST_DATA (3 << 24)
# define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28)
# define R128_GMC_AUX_CLIP_DIS (1 << 29)
# define R128_GMC_WR_MSK_DIS (1 << 30)
# define R128_ROP3_S 0x00cc0000
# define R128_ROP3_P 0x00f00000
#define R128_DP_WRITE_MASK 0x16cc
#define R128_DST_PITCH_OFFSET_C 0x1c80
# define R128_DST_TILE (1 << 31)
#define R128_GEN_RESET_CNTL 0x00f0
# define R128_SOFT_RESET_GUI (1 << 0)
#define R128_GUI_SCRATCH_REG0 0x15e0
#define R128_GUI_SCRATCH_REG1 0x15e4
#define R128_GUI_SCRATCH_REG2 0x15e8
#define R128_GUI_SCRATCH_REG3 0x15ec
#define R128_GUI_SCRATCH_REG4 0x15f0
#define R128_GUI_SCRATCH_REG5 0x15f4
#define R128_GUI_STAT 0x1740
# define R128_GUI_FIFOCNT_MASK 0x0fff
# define R128_GUI_ACTIVE (1 << 31)
#define R128_MCLK_CNTL 0x000f
# define R128_FORCE_GCP (1 << 16)
# define R128_FORCE_PIPE3D_CP (1 << 17)
# define R128_FORCE_RCP (1 << 18)
#define R128_PC_GUI_CTLSTAT 0x1748
#define R128_PC_NGUI_CTLSTAT 0x0184
# define R128_PC_FLUSH_GUI (3 << 0)
# define R128_PC_RI_GUI (1 << 2)
# define R128_PC_FLUSH_ALL 0x00ff
# define R128_PC_BUSY (1 << 31)
#define R128_PCI_GART_PAGE 0x017c
#define R128_PRIM_TEX_CNTL_C 0x1cb0
#define R128_SCALE_3D_CNTL 0x1a00
#define R128_SEC_TEX_CNTL_C 0x1d00
#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c
#define R128_SETUP_CNTL 0x1bc4
#define R128_STEN_REF_MASK_C 0x1d40
#define R128_TEX_CNTL_C 0x1c9c
# define R128_TEX_CACHE_FLUSH (1 << 23)
#define R128_WAIT_UNTIL 0x1720
# define R128_EVENT_CRTC_OFFSET (1 << 0)
#define R128_WINDOW_XY_OFFSET 0x1bcc
/* CCE registers
*/
#define R128_PM4_BUFFER_OFFSET 0x0700
#define R128_PM4_BUFFER_CNTL 0x0704
# define R128_PM4_MASK (15 << 28)
# define R128_PM4_NONPM4 (0 << 28)
# define R128_PM4_192PIO (1 << 28)
# define R128_PM4_192BM (2 << 28)
# define R128_PM4_128PIO_64INDBM (3 << 28)
# define R128_PM4_128BM_64INDBM (4 << 28)
# define R128_PM4_64PIO_128INDBM (5 << 28)
# define R128_PM4_64BM_128INDBM (6 << 28)
# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28)
# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28)
# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28)
#define R128_PM4_BUFFER_WM_CNTL 0x0708
# define R128_WMA_SHIFT 0
# define R128_WMB_SHIFT 8
# define R128_WMC_SHIFT 16
# define R128_WB_WM_SHIFT 24
#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c
#define R128_PM4_BUFFER_DL_RPTR 0x0710
#define R128_PM4_BUFFER_DL_WPTR 0x0714
# define R128_PM4_BUFFER_DL_DONE (1 << 31)
#define R128_PM4_VC_FPU_SETUP 0x071c
#define R128_PM4_IW_INDOFF 0x0738
#define R128_PM4_IW_INDSIZE 0x073c
#define R128_PM4_STAT 0x07b8
# define R128_PM4_FIFOCNT_MASK 0x0fff
# define R128_PM4_BUSY (1 << 16)
# define R128_PM4_GUI_ACTIVE (1 << 31)
#define R128_PM4_MICROCODE_ADDR 0x07d4
#define R128_PM4_MICROCODE_RADDR 0x07d8
#define R128_PM4_MICROCODE_DATAH 0x07dc
#define R128_PM4_MICROCODE_DATAL 0x07e0
#define R128_PM4_BUFFER_ADDR 0x07f0
#define R128_PM4_MICRO_CNTL 0x07fc
# define R128_PM4_MICRO_FREERUN (1 << 30)
#define R128_PM4_FIFO_DATA_EVEN 0x1000
#define R128_PM4_FIFO_DATA_ODD 0x1004
/* CCE command packets
*/
#define R128_CCE_PACKET0 0x00000000
#define R128_CCE_PACKET1 0x40000000
#define R128_CCE_PACKET2 0x80000000
#define R128_CCE_PACKET3 0xC0000000
# define R128_CNTL_HOSTDATA_BLT 0x00009400
# define R128_CNTL_PAINT_MULTI 0x00009A00
# define R128_CNTL_BITBLT_MULTI 0x00009B00
# define R128_3D_RNDR_GEN_INDX_PRIM 0x00002300
#define R128_CCE_PACKET_MASK 0xC0000000
#define R128_CCE_PACKET_COUNT_MASK 0x3fff0000
#define R128_CCE_PACKET0_REG_MASK 0x000007ff
#define R128_CCE_PACKET1_REG0_MASK 0x000007ff
#define R128_CCE_PACKET1_REG1_MASK 0x003ff800
#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000
#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001
#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002
#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003
#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004
#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005
#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006
#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007
#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010
#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020
#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030
#define R128_CCE_VC_CNTL_NUM_SHIFT 16
#define R128_DATATYPE_CI8 2
#define R128_DATATYPE_ARGB1555 3
#define R128_DATATYPE_RGB565 4
#define R128_DATATYPE_RGB888 5
#define R128_DATATYPE_ARGB8888 6
#define R128_DATATYPE_RGB332 7
#define R128_DATATYPE_RGB8 9
#define R128_DATATYPE_ARGB4444 15
/* Constants */
#define R128_AGP_OFFSET 0x02000000
#define R128_WATERMARK_L 16
#define R128_WATERMARK_M 8
#define R128_WATERMARK_N 8
#define R128_WATERMARK_K 128
#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */
#define R128_LAST_FRAME_REG R128_GUI_SCRATCH_REG0
#define R128_LAST_DISPATCH_REG R128_GUI_SCRATCH_REG1
#define R128_MAX_VB_AGE 0x7fffffff
#define R128_MAX_VB_VERTS (0xffff)
#define R128_RING_HIGH_MARK 128
#define R128_PERFORMANCE_BOXES 0
#define R128_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
#define R128_DEREF(reg) *(volatile u32 *)R128_ADDR( reg )
#ifdef __alpha__
#define R128_READ(reg) (_R128_READ((u32 *)R128_ADDR(reg)))
static inline u32 _R128_READ(u32 *addr)
{
DRM_OS_READMEMORYBARRIER;
return *(volatile u32 *)addr;
}
#define R128_WRITE(reg,val) \
do { \
DRM_OS_WRITEMEMORYBARRIER; \
R128_DEREF(reg) = val; \
} while (0)
#else
#define R128_READ(reg) le32_to_cpu( R128_DEREF( reg ) )
#define R128_WRITE(reg,val) \
do { \
R128_DEREF( reg ) = cpu_to_le32( val ); \
} while (0)
#endif
#define R128_DEREF8(reg) *(volatile u8 *)R128_ADDR( reg )
#ifdef __alpha__
#define R128_READ8(reg) _R128_READ8((u8 *)R128_ADDR(reg))
static inline u8 _R128_READ8(u8 *addr)
{
DRM_OS_READMEMORYBARRIER;
return *(volatile u8 *)addr;
}
#define R128_WRITE8(reg,val) \
do { \
DRM_OS_WRITEMEMORYBARRIER; \
R128_DEREF8(reg) = val; \
} while (0)
#else
#define R128_READ8(reg) R128_DEREF8( reg )
#define R128_WRITE8(reg,val) do { R128_DEREF8( reg ) = val; } while (0)
#endif
#define R128_WRITE_PLL(addr,val) \
do { \
R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
((addr) & 0x1f) | R128_PLL_WR_EN); \
R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
} while (0)
extern int R128_READ_PLL(drm_device_t *dev, int addr);
#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \
((n) << 16) | ((reg) >> 2))
#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \
(((reg1) >> 2) << 11) | ((reg0) >> 2))
#define CCE_PACKET2() (R128_CCE_PACKET2)
#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \
(pkt) | ((n) << 16))
/* ================================================================
* Misc helper macros
*/
#define LOCK_TEST_WITH_RETURN( dev ) \
do { \
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
dev->lock.pid != DRM_OS_CURRENTPID ) { \
DRM_ERROR( "%s called without lock held\n", \
__FUNCTION__ ); \
DRM_OS_RETURN( EINVAL ); \
} \
} while (0)
#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \
do { \
drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
if ( ring->space < ring->high_mark ) { \
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \
r128_update_ring_snapshot( ring ); \
if ( ring->space >= ring->high_mark ) \
goto __ring_space_done; \
DRM_OS_DELAY( 1 ); \
} \
DRM_ERROR( "ring space check failed!\n" ); \
DRM_OS_RETURN( EBUSY ); \
} \
__ring_space_done: \
; \
} while (0)
#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
do { \
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
int __ret = r128_do_cce_idle( dev_priv ); \
if ( __ret < 0 ) return __ret; \
sarea_priv->last_dispatch = 0; \
r128_freelist_reset( dev ); \
} \
} while (0)
#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \
OUT_RING( R128_EVENT_CRTC_OFFSET ); \
} while (0)
/* ================================================================
* Ring control
*/
#define r128_flush_write_combine() DRM_OS_READMEMORYBARRIER
#define R128_VERBOSE 0
#define RING_LOCALS \
int write; unsigned int tail_mask; volatile u32 *ring;
#define BEGIN_RING( n ) do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "BEGIN_RING( %d ) in %s\n", \
(n), __FUNCTION__ ); \
} \
if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \
} \
dev_priv->ring.space -= (n) * sizeof(u32); \
ring = dev_priv->ring.start; \
write = dev_priv->ring.tail; \
tail_mask = dev_priv->ring.tail_mask; \
} while (0)
/* You can set this to zero if you want. If the card locks up, you'll
* need to keep this set. It works around a bug in early revs of the
* Rage 128 chipset, where the CCE would read 32 dwords past the end of
* the ring buffer before wrapping around.
*/
#define R128_BROKEN_CCE 1
#define ADVANCE_RING() do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
write, dev_priv->ring.tail ); \
} \
if ( R128_BROKEN_CCE && write < 32 ) { \
memcpy( dev_priv->ring.end, \
dev_priv->ring.start, \
write * sizeof(u32) ); \
} \
r128_flush_write_combine(); \
dev_priv->ring.tail = write; \
R128_WRITE( R128_PM4_BUFFER_DL_WPTR, write ); \
} while (0)
#define OUT_RING( x ) do { \
if ( R128_VERBOSE ) { \
DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \
(unsigned int)(x), write ); \
} \
ring[write++] = cpu_to_le32( x ); \
write &= tail_mask; \
} while (0)
#endif /* __R128_DRV_H__ */

1572
bsd/r128_state.c
View file

File diff suppressed because it is too large Load diff

49
linux-core/drm_os_linux.h Normal file
View file

@ -0,0 +1,49 @@
#define __NO_VERSION__
#include <linux/interrupt.h> /* For task queue support */
#include <linux/delay.h>
#define DRM_OS_IOCTL struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data
#define DRM_OS_RETURN(d) return -(d)
#define DRM_OS_ERR(d) -(d)
#define DRM_OS_CURRENTPID current->pid
#define DRM_OS_DELAY(d) udelay(d)
#define DRM_OS_READ8(addr) readb(addr)
#define DRM_OS_READ32(addr) readl(addr)
#define DRM_OS_WRITE8(addr, val) writeb(val, addr)
#define DRM_OS_WRITE32(addr, val) writel(val, addr)
#define DRM_OS_READMEMORYBARRIER mb()
#define DRM_OS_WRITEMEMORYBARRIER wmb()
/* For data going from/to the kernel through the ioctl argument */
#define DRM_OS_KRNFROMUSR(arg1, arg2, arg3) \
if ( copy_from_user(&arg1, arg2, arg3) ) \
return -EFAULT
#define DRM_OS_KRNTOUSR(arg1, arg2, arg3) \
if ( copy_to_user(arg1, &arg2, arg3) ) \
return -EFAULT
/* Other copying of data from/to kernel space */
#define DRM_OS_COPYFROMUSR(arg1, arg2, arg3) \
copy_from_user(arg1, arg2, arg3)
#define DRM_OS_COPYTOUSR(arg1, arg2, arg3) \
copy_to_user(arg1, arg2, arg3)
/* malloc/free without the overhead of DRM(alloc) */
#define DRM_OS_MALLOC(x) kmalloc(x, GFP_KERNEL)
#define DRM_OS_FREE(x) kfree(x)
#define DRM_OS_GETSAREA() \
do { \
struct list_head *list; \
list_for_each( list, &dev->maplist->head ) { \
drm_map_list_t *entry = (drm_map_list_t *)list; \
if ( entry->map && \
entry->map->type == _DRM_SHM && \
(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
dev_priv->sarea = entry->map; \
break; \
} \
} \
} while (0)

49
linux/drm_os_linux.h Normal file
View file

@ -0,0 +1,49 @@
#define __NO_VERSION__
#include <linux/interrupt.h> /* For task queue support */
#include <linux/delay.h>
#define DRM_OS_IOCTL struct inode *inode, struct file *filp, unsigned int cmd, unsigned long data
#define DRM_OS_RETURN(d) return -(d)
#define DRM_OS_ERR(d) -(d)
#define DRM_OS_CURRENTPID current->pid
#define DRM_OS_DELAY(d) udelay(d)
#define DRM_OS_READ8(addr) readb(addr)
#define DRM_OS_READ32(addr) readl(addr)
#define DRM_OS_WRITE8(addr, val) writeb(val, addr)
#define DRM_OS_WRITE32(addr, val) writel(val, addr)
#define DRM_OS_READMEMORYBARRIER mb()
#define DRM_OS_WRITEMEMORYBARRIER wmb()
/* For data going from/to the kernel through the ioctl argument */
#define DRM_OS_KRNFROMUSR(arg1, arg2, arg3) \
if ( copy_from_user(&arg1, arg2, arg3) ) \
return -EFAULT
#define DRM_OS_KRNTOUSR(arg1, arg2, arg3) \
if ( copy_to_user(arg1, &arg2, arg3) ) \
return -EFAULT
/* Other copying of data from/to kernel space */
#define DRM_OS_COPYFROMUSR(arg1, arg2, arg3) \
copy_from_user(arg1, arg2, arg3)
#define DRM_OS_COPYTOUSR(arg1, arg2, arg3) \
copy_to_user(arg1, arg2, arg3)
/* malloc/free without the overhead of DRM(alloc) */
#define DRM_OS_MALLOC(x) kmalloc(x, GFP_KERNEL)
#define DRM_OS_FREE(x) kfree(x)
#define DRM_OS_GETSAREA() \
do { \
struct list_head *list; \
list_for_each( list, &dev->maplist->head ) { \
drm_map_list_t *entry = (drm_map_list_t *)list; \
if ( entry->map && \
entry->map->type == _DRM_SHM && \
(entry->map->flags & _DRM_CONTAINS_LOCK) ) { \
dev_priv->sarea = entry->map; \
break; \
} \
} \
} while (0)

197
shared-core/r128_cce.c
View file

@ -28,19 +28,14 @@
* Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
#include "r128.h"
#include "drmP.h"
#include "drm.h"
#include "r128_drm.h"
#include "r128_drv.h"
#include <linux/interrupt.h> /* For task queue support */
#include <linux/delay.h>
#define R128_FIFO_DEBUG 0
/* CCE microcode (from ATI) */
static u32 r128_cce_microcode[] = {
0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
@ -86,6 +81,7 @@ static u32 r128_cce_microcode[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
int r128_do_wait_for_idle( drm_r128_private_t *dev_priv );
int R128_READ_PLL(drm_device_t *dev, int addr)
{
@ -130,13 +126,13 @@ static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv )
if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) {
return 0;
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
@ -146,13 +142,13 @@ static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK;
if ( slots >= entries ) return 0;
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
@ -160,20 +156,20 @@ int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
int i, ret;
ret = r128_do_wait_for_fifo( dev_priv, 64 );
if ( ret < 0 ) return ret;
if ( ret ) return ret;
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) {
r128_do_pixcache_flush( dev_priv );
return 0;
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
@ -186,7 +182,7 @@ static void r128_cce_load_microcode( drm_r128_private_t *dev_priv )
{
int i;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
r128_do_wait_for_idle( dev_priv );
@ -227,14 +223,14 @@ int r128_do_cce_idle( drm_r128_private_t *dev_priv )
return r128_do_pixcache_flush( dev_priv );
}
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "failed!\n" );
r128_status( dev_priv );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
/* Start the Concurrent Command Engine.
@ -322,7 +318,7 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev,
u32 ring_start;
u32 tmp;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
/* The manual (p. 2) says this address is in "VM space". This
* means it's an offset from the start of AGP space.
@ -377,13 +373,12 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev,
static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
{
drm_r128_private_t *dev_priv;
struct list_head *list;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
if ( dev_priv == NULL )
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
memset( dev_priv, 0, sizeof(drm_r128_private_t) );
@ -393,7 +388,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR( "PCI GART memory not allocated!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
dev_priv->usec_timeout = init->usec_timeout;
@ -402,7 +397,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_DEBUG( "TIMEOUT problem!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
dev_priv->cce_mode = init->cce_mode;
@ -422,7 +417,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_DEBUG( "Bad cce_mode!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
switch ( init->cce_mode ) {
@ -484,20 +479,13 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
(dev_priv->span_offset >> 5));
list_for_each(list, &dev->maplist->head) {
drm_map_list_t *r_list = (drm_map_list_t *)list;
if( r_list->map &&
r_list->map->type == _DRM_SHM &&
r_list->map->flags & _DRM_CONTAINS_LOCK ) {
dev_priv->sarea = r_list->map;
break;
}
}
DRM_OS_GETSAREA();
if(!dev_priv->sarea) {
DRM_ERROR("could not find sarea!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
@ -505,35 +493,35 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("could not find framebuffer!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
if(!dev_priv->mmio) {
DRM_ERROR("could not find mmio region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
if(!dev_priv->cce_ring) {
DRM_ERROR("could not find cce ring region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
if(!dev_priv->ring_rptr) {
DRM_ERROR("could not find ring read pointer!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
if(!dev_priv->buffers) {
DRM_ERROR("could not find dma buffer region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( !dev_priv->is_pci ) {
@ -543,7 +531,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("could not find agp texture region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
}
@ -561,7 +549,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("Could not ioremap agp regions!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
} else {
dev_priv->cce_ring->handle =
@ -599,16 +587,18 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
R128_WRITE( R128_LAST_DISPATCH_REG,
dev_priv->sarea_priv->last_dispatch );
#if __REALLY_HAVE_SG
if ( dev_priv->is_pci ) {
if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
&dev_priv->bus_pci_gart) ) {
DRM_ERROR( "failed to init PCI GART!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart );
}
#endif
r128_cce_init_ring_buffer( dev, dev_priv );
r128_cce_load_microcode( dev_priv );
@ -625,16 +615,20 @@ int r128_do_cleanup_cce( drm_device_t *dev )
if ( dev->dev_private ) {
drm_r128_private_t *dev_priv = dev->dev_private;
#if __REALLY_HAVE_SG
if ( !dev_priv->is_pci ) {
#endif
DRM_IOREMAPFREE( dev_priv->cce_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
#if __REALLY_HAVE_SG
} else {
if (!DRM(ati_pcigart_cleanup)( dev,
dev_priv->phys_pci_gart,
dev_priv->bus_pci_gart ))
DRM_ERROR( "failed to cleanup PCI GART!\n" );
}
#endif
DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
DRM_MEM_DRIVER );
@ -644,17 +638,14 @@ int r128_do_cleanup_cce( drm_device_t *dev )
return 0;
}
int r128_cce_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_init( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_init_t init;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
if ( copy_from_user( &init, (drm_r128_init_t *)arg, sizeof(init) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( init, (drm_r128_init_t *)data, sizeof(init) );
switch ( init.func ) {
case R128_INIT_CCE:
@ -663,21 +654,19 @@ int r128_cce_init( struct inode *inode, struct file *filp,
return r128_do_cleanup_cce( dev );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
int r128_cce_start( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_start( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) {
DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ );
DRM_DEBUG( "%s while CCE running\n", __func__ );
return 0;
}
@ -689,20 +678,17 @@ int r128_cce_start( struct inode *inode, struct file *filp,
/* Stop the CCE. The engine must have been idled before calling this
* routine.
*/
int r128_cce_stop( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_stop( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_cce_stop_t stop;
int ret;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stop, (drm_r128_init_t *)arg, sizeof(stop) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR(stop, (drm_r128_cce_stop_t *)data, sizeof(stop) );
/* Flush any pending CCE commands. This ensures any outstanding
* commands are exectuted by the engine before we turn it off.
@ -716,7 +702,7 @@ int r128_cce_stop( struct inode *inode, struct file *filp,
*/
if ( stop.idle ) {
ret = r128_do_cce_idle( dev_priv );
if ( ret < 0 ) return ret;
if ( ret ) return ret;
}
/* Finally, we can turn off the CCE. If the engine isn't idle,
@ -733,19 +719,17 @@ int r128_cce_stop( struct inode *inode, struct file *filp,
/* Just reset the CCE ring. Called as part of an X Server engine reset.
*/
int r128_cce_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_reset( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
return -EINVAL;
DRM_DEBUG( "%s called before init done\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
r128_do_cce_reset( dev_priv );
@ -756,13 +740,11 @@ int r128_cce_reset( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_idle( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_idle( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
@ -773,12 +755,10 @@ int r128_cce_idle( struct inode *inode, struct file *filp,
return r128_do_cce_idle( dev_priv );
}
int r128_engine_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_engine_reset( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_OS_DEVICE;
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
@ -793,7 +773,7 @@ int r128_engine_reset( struct inode *inode, struct file *filp,
static int r128_do_init_pageflip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET );
dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
@ -811,7 +791,7 @@ static int r128_do_init_pageflip( drm_device_t *dev )
int r128_do_cleanup_pageflip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset );
R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
@ -822,17 +802,14 @@ int r128_do_cleanup_pageflip( drm_device_t *dev )
return 0;
}
int r128_fullscreen( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_fullscreen( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_fullscreen_t fs;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &fs, (drm_r128_fullscreen_t *)arg, sizeof(fs) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( fs, (drm_r128_fullscreen_t *)data, sizeof(fs) );
switch ( fs.func ) {
case R128_INIT_FULLSCREEN:
@ -841,7 +818,7 @@ int r128_fullscreen( struct inode *inode, struct file *filp,
return r128_do_cleanup_pageflip( dev );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
@ -930,7 +907,7 @@ drm_buf_t *r128_freelist_get( drm_device_t *dev )
return buf;
}
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
DRM_ERROR( "returning NULL!\n" );
@ -963,12 +940,12 @@ int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
r128_update_ring_snapshot( ring );
if ( ring->space >= n )
return 0;
udelay( 1 );
DRM_OS_DELAY( 1 );
}
/* FIXME: This is being ignored... */
DRM_ERROR( "failed!\n" );
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d )
@ -978,50 +955,47 @@ static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d )
for ( i = d->granted_count ; i < d->request_count ; i++ ) {
buf = r128_freelist_get( dev );
if ( !buf ) return -EAGAIN;
if ( !buf ) return DRM_OS_ERR(EAGAIN);
buf->pid = current->pid;
buf->pid = DRM_OS_CURRENTPID;
if ( copy_to_user( &d->request_indices[i], &buf->idx,
if ( DRM_OS_COPYTOUSR( &d->request_indices[i], &buf->idx,
sizeof(buf->idx) ) )
return -EFAULT;
if ( copy_to_user( &d->request_sizes[i], &buf->total,
return DRM_OS_ERR(EFAULT);
if ( DRM_OS_COPYTOUSR( &d->request_sizes[i], &buf->total,
sizeof(buf->total) ) )
return -EFAULT;
return DRM_OS_ERR(EFAULT);
d->granted_count++;
}
return 0;
}
int r128_cce_buffers( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_buffers( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_device_dma_t *dma = dev->dma;
int ret = 0;
drm_dma_t d;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &d, (drm_dma_t *) arg, sizeof(d) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( d, (drm_dma_t *) data, sizeof(d) );
/* Please don't send us buffers.
*/
if ( d.send_count != 0 ) {
DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
current->pid, d.send_count );
return -EINVAL;
DRM_OS_CURRENTPID, d.send_count );
return DRM_OS_ERR(EINVAL);
}
/* We'll send you buffers.
*/
if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
current->pid, d.request_count, dma->buf_count );
return -EINVAL;
DRM_OS_CURRENTPID, d.request_count, dma->buf_count );
return DRM_OS_ERR(EINVAL);
}
d.granted_count = 0;
@ -1030,8 +1004,7 @@ int r128_cce_buffers( struct inode *inode, struct file *filp,
ret = r128_cce_get_buffers( dev, &d );
}
if ( copy_to_user( (drm_dma_t *) arg, &d, sizeof(d) ) )
return -EFAULT;
DRM_OS_KRNTOUSR((drm_dma_t *) data, d, sizeof(d) );
return ret;
}

80
shared-core/r128_drv.h
View file

@ -34,8 +34,8 @@
#ifndef __R128_DRV_H__
#define __R128_DRV_H__
#define GET_RING_HEAD(ring) readl( (volatile u32 *) (ring)->head )
#define SET_RING_HEAD(ring,val) writel( (val), (volatile u32 *) (ring)->head )
#define GET_RING_HEAD(ring) DRM_OS_READ32( (volatile u32 *) (ring)->head )
#define SET_RING_HEAD(ring,val) DRM_OS_WRITE32( (volatile u32 *) (ring)->head, (val) )
typedef struct drm_r128_freelist {
unsigned int age;
@ -116,29 +116,21 @@ typedef struct drm_r128_buf_priv {
} drm_r128_buf_priv_t;
/* r128_cce.c */
extern int r128_cce_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_start( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_stop( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_idle( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_engine_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_fullscreen( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_buffers( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_init( DRM_OS_IOCTL );
extern int r128_cce_start( DRM_OS_IOCTL );
extern int r128_cce_stop( DRM_OS_IOCTL );
extern int r128_cce_reset( DRM_OS_IOCTL );
extern int r128_cce_idle( DRM_OS_IOCTL );
extern int r128_engine_reset( DRM_OS_IOCTL );
extern int r128_fullscreen( DRM_OS_IOCTL );
extern int r128_cce_buffers( DRM_OS_IOCTL );
extern void r128_freelist_reset( drm_device_t *dev );
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
static inline void
static __inline__ void
r128_update_ring_snapshot( drm_r128_ring_buffer_t *ring )
{
ring->space = (GET_RING_HEAD( ring ) - ring->tail) * sizeof(u32);
@ -151,22 +143,14 @@ extern int r128_do_cleanup_cce( drm_device_t *dev );
extern int r128_do_cleanup_pageflip( drm_device_t *dev );
/* r128_state.c */
extern int r128_cce_clear( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_swap( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_blit( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_depth( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_stipple( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_clear( DRM_OS_IOCTL );
extern int r128_cce_swap( DRM_OS_IOCTL );
extern int r128_cce_vertex( DRM_OS_IOCTL );
extern int r128_cce_indices( DRM_OS_IOCTL );
extern int r128_cce_blit( DRM_OS_IOCTL );
extern int r128_cce_depth( DRM_OS_IOCTL );
extern int r128_cce_stipple( DRM_OS_IOCTL );
extern int r128_cce_indirect( DRM_OS_IOCTL );
/* Register definitions, register access macros and drmAddMap constants
@ -384,11 +368,11 @@ extern int r128_cce_indirect( struct inode *inode, struct file *filp,
#define R128_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
#define R128_READ(reg) readl( (volatile u32 *) R128_ADDR(reg) )
#define R128_WRITE(reg,val) writel( (val), (volatile u32 *) R128_ADDR(reg) )
#define R128_READ(reg) DRM_OS_READ32( (volatile u32 *) R128_ADDR(reg) )
#define R128_WRITE(reg,val) DRM_OS_WRITE32( (volatile u32 *) R128_ADDR(reg), (val) )
#define R128_READ8(reg) readb( (volatile u8 *) R128_ADDR(reg) )
#define R128_WRITE8(reg,val) writeb( (val), (volatile u8 *) R128_ADDR(reg) )
#define R128_READ8(reg) DRM_OS_READ8( (volatile u8 *) R128_ADDR(reg) )
#define R128_WRITE8(reg,val) DRM_OS_WRITE8( (volatile u8 *) R128_ADDR(reg), (val) )
#define R128_WRITE_PLL(addr,val) \
do { \
@ -416,10 +400,9 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
#define LOCK_TEST_WITH_RETURN( dev ) \
do { \
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
dev->lock.pid != current->pid ) { \
DRM_ERROR( "%s called without lock held\n", \
__FUNCTION__ ); \
return -EINVAL; \
dev->lock.pid != DRM_OS_CURRENTPID ) { \
DRM_ERROR( "%s called without lock held\n", __func__ ); \
return DRM_OS_ERR(EINVAL); \
} \
} while (0)
@ -431,12 +414,13 @@ do { \
r128_update_ring_snapshot( ring ); \
if ( ring->space >= ring->high_mark ) \
goto __ring_space_done; \
udelay( 1 ); \
DRM_OS_DELAY(1); \
} \
DRM_ERROR( "ring space check failed!\n" ); \
return -EBUSY; \
return DRM_OS_ERR(EBUSY); \
} \
__ring_space_done: \
; \
} while (0)
#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
@ -444,7 +428,7 @@ do { \
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
int __ret = r128_do_cce_idle( dev_priv ); \
if ( __ret < 0 ) return __ret; \
if ( __ret ) return __ret; \
sarea_priv->last_dispatch = 0; \
r128_freelist_reset( dev ); \
} \
@ -463,7 +447,7 @@ do { \
#if defined(__powerpc__)
#define r128_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring )
#else
#define r128_flush_write_combine() mb()
#define r128_flush_write_combine() DRM_OS_READMEMORYBARRIER
#endif
@ -475,7 +459,7 @@ do { \
#define BEGIN_RING( n ) do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "BEGIN_RING( %d ) in %s\n", \
(n), __FUNCTION__ ); \
(n), __func__ ); \
} \
if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \

373
shared-core/r128_state.c
View file

@ -27,14 +27,11 @@
* Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
#include "r128.h"
#include "drmP.h"
#include "drm.h"
#include "r128_drm.h"
#include "r128_drv.h"
#include "drm.h"
#include <linux/delay.h>
/* ================================================================
@ -46,7 +43,7 @@ static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
{
u32 aux_sc_cntl = 0x00000000;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 17 );
@ -84,12 +81,12 @@ static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
ADVANCE_RING();
}
static inline void r128_emit_core( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 2 );
@ -99,12 +96,12 @@ static inline void r128_emit_core( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_context( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 13 );
@ -125,12 +122,12 @@ static inline void r128_emit_context( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_setup( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 3 );
@ -141,12 +138,12 @@ static inline void r128_emit_setup( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_masks( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 5 );
@ -160,12 +157,12 @@ static inline void r128_emit_masks( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_window( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 2 );
@ -175,14 +172,14 @@ static inline void r128_emit_window( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_tex0( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0];
int i;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS );
@ -202,13 +199,13 @@ static inline void r128_emit_tex0( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_tex1( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
int i;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS );
@ -226,12 +223,12 @@ static inline void r128_emit_tex1( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_state( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int dirty = sarea_priv->dirty;
DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty );
DRM_DEBUG( "%s: dirty=0x%08x\n", __func__, dirty );
if ( dirty & R128_UPLOAD_CORE ) {
r128_emit_core( dev_priv );
@ -372,7 +369,7 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
unsigned int flags = clear->flags;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
unsigned int tmp = flags;
@ -475,7 +472,7 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
drm_clip_rect_t *pbox = sarea_priv->boxes;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
@ -531,7 +528,7 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
RING_LOCALS;
DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page );
DRM_DEBUG( "page=%d\n", dev_priv->current_page );
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
@ -580,8 +577,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
int prim = buf_priv->prim;
int i = 0;
RING_LOCALS;
DRM_DEBUG( "%s: buf=%d nbox=%d\n",
__FUNCTION__, buf->idx, sarea_priv->nbox );
DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox );
if ( 0 )
r128_print_dirty( "dispatch_vertex", sarea_priv->dirty );
@ -792,7 +788,7 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
u32 *data;
int dword_shift, dwords;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
/* The compiler won't optimize away a division by a variable,
* even if the only legal values are powers of two. Thus, we'll
@ -813,7 +809,7 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
break;
default:
DRM_ERROR( "invalid blit format %d\n", blit->format );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
/* Flush the pixel cache, and mark the contents as Read Invalid.
@ -833,14 +829,14 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
buf = dma->buflist[blit->idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", blit->idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf_priv->discard = 1;
@ -902,36 +898,36 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
u8 *mask;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) {
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( &y, depth->y, sizeof(y) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) {
return DRM_OS_ERR(EFAULT);
}
buffer = kmalloc( depth->n * sizeof(u32), GFP_KERNEL );
buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) );
if ( buffer == NULL )
return -ENOMEM;
if ( copy_from_user( buffer, depth->buffer,
return DRM_OS_ERR(ENOMEM);
if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer,
depth->n * sizeof(u32) ) ) {
kfree( buffer );
return -EFAULT;
DRM_OS_FREE( buffer );
return DRM_OS_ERR(EFAULT);
}
if ( depth->mask ) {
mask = kmalloc( depth->n * sizeof(u8), GFP_KERNEL );
mask = DRM_OS_MALLOC( depth->n * sizeof(u8) );
if ( mask == NULL ) {
kfree( buffer );
return -ENOMEM;
DRM_OS_FREE( buffer );
return DRM_OS_ERR(ENOMEM;)
}
if ( copy_from_user( mask, depth->mask,
if ( DRM_OS_COPYFROMUSR( mask, depth->mask,
depth->n * sizeof(u8) ) ) {
kfree( buffer );
kfree( mask );
return -EFAULT;
DRM_OS_FREE( buffer );
DRM_OS_FREE( mask );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++, x++ ) {
@ -957,7 +953,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
}
}
kfree( mask );
DRM_OS_FREE( mask );
} else {
for ( i = 0 ; i < count ; i++, x++ ) {
BEGIN_RING( 6 );
@ -981,7 +977,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
}
}
kfree( buffer );
DRM_OS_FREE( buffer );
return 0;
}
@ -995,59 +991,59 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
u8 *mask;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
x = kmalloc( count * sizeof(*x), GFP_KERNEL );
x = DRM_OS_MALLOC( count * sizeof(*x) );
if ( x == NULL ) {
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
y = kmalloc( count * sizeof(*y), GFP_KERNEL );
y = DRM_OS_MALLOC( count * sizeof(*y) );
if ( y == NULL ) {
kfree( x );
return -ENOMEM;
DRM_OS_FREE( x );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( x, depth->x, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( y, depth->y, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
buffer = kmalloc( depth->n * sizeof(u32), GFP_KERNEL );
buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) );
if ( buffer == NULL ) {
kfree( x );
kfree( y );
return -ENOMEM;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( buffer, depth->buffer,
if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer,
depth->n * sizeof(u32) ) ) {
kfree( x );
kfree( y );
kfree( buffer );
return -EFAULT;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return DRM_OS_ERR(EFAULT);
}
if ( depth->mask ) {
mask = kmalloc( depth->n * sizeof(u8), GFP_KERNEL );
mask = DRM_OS_MALLOC( depth->n * sizeof(u8) );
if ( mask == NULL ) {
kfree( x );
kfree( y );
kfree( buffer );
return -ENOMEM;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( mask, depth->mask,
if ( DRM_OS_COPYFROMUSR( mask, depth->mask,
depth->n * sizeof(u8) ) ) {
kfree( x );
kfree( y );
kfree( buffer );
kfree( mask );
return -EFAULT;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
DRM_OS_FREE( mask );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++ ) {
@ -1073,7 +1069,7 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
}
}
kfree( mask );
DRM_OS_FREE( mask );
} else {
for ( i = 0 ; i < count ; i++ ) {
BEGIN_RING( 6 );
@ -1097,9 +1093,9 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
}
}
kfree( x );
kfree( y );
kfree( buffer );
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return 0;
}
@ -1110,14 +1106,14 @@ static int r128_cce_dispatch_read_span( drm_device_t *dev,
drm_r128_private_t *dev_priv = dev->dev_private;
int count, x, y;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) {
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( &y, depth->y, sizeof(y) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) {
return DRM_OS_ERR(EFAULT);
}
BEGIN_RING( 7 );
@ -1152,31 +1148,31 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
int count, *x, *y;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
count = depth->n;
if ( count > dev_priv->depth_pitch ) {
count = dev_priv->depth_pitch;
}
x = kmalloc( count * sizeof(*x), GFP_KERNEL );
x = DRM_OS_MALLOC( count * sizeof(*x) );
if ( x == NULL ) {
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
y = kmalloc( count * sizeof(*y), GFP_KERNEL );
y = DRM_OS_MALLOC( count * sizeof(*y) );
if ( y == NULL ) {
kfree( x );
return -ENOMEM;
DRM_OS_FREE( x );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( x, depth->x, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( y, depth->y, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++ ) {
@ -1203,8 +1199,8 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
ADVANCE_RING();
}
kfree( x );
kfree( y );
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return 0;
}
@ -1219,7 +1215,7 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
drm_r128_private_t *dev_priv = dev->dev_private;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
BEGIN_RING( 33 );
@ -1236,21 +1232,18 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
* IOCTL functions
*/
int r128_cce_clear( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_clear( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_clear_t clear;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &clear, (drm_r128_clear_t *) arg,
sizeof(clear) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( clear, (drm_r128_clear_t *) data,
sizeof(clear) );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1266,14 +1259,12 @@ int r128_cce_clear( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_swap( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_swap( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
LOCK_TEST_WITH_RETURN( dev );
@ -1293,11 +1284,9 @@ int r128_cce_swap( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_vertex( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1307,27 +1296,26 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &vertex, (drm_r128_vertex_t *)arg,
sizeof(vertex) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( vertex, (drm_r128_vertex_t *) data,
sizeof(vertex) );
DRM_DEBUG( "%s: pid=%d index=%d count=%d discard=%d\n",
__FUNCTION__, current->pid,
DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
DRM_OS_CURRENTPID,
vertex.idx, vertex.count, vertex.discard );
if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
vertex.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( vertex.prim < 0 ||
vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
DRM_ERROR( "buffer prim %d\n", vertex.prim );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1336,14 +1324,14 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf->used = vertex.count;
@ -1355,11 +1343,9 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_indices( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1370,27 +1356,25 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &elts, (drm_r128_indices_t *)arg,
sizeof(elts) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( elts, (drm_r128_indices_t *) data,
sizeof(elts) );
DRM_DEBUG( "%s: pid=%d buf=%d s=%d e=%d d=%d\n",
__FUNCTION__, current->pid,
DRM_DEBUG( "pid=%d buf=%d s=%d e=%d d=%d\n", DRM_OS_CURRENTPID,
elts.idx, elts.start, elts.end, elts.discard );
if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
elts.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( elts.prim < 0 ||
elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
DRM_ERROR( "buffer prim %d\n", elts.prim );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1399,14 +1383,14 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
buf = dma->buflist[elts.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", elts.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
count = (elts.end - elts.start) / sizeof(u16);
@ -1414,11 +1398,11 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
if ( elts.start & 0x7 ) {
DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( elts.start < buf->used ) {
DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf->used = elts.end;
@ -1430,28 +1414,24 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_blit( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_blit( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_device_dma_t *dma = dev->dma;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_blit_t blit;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &blit, (drm_r128_blit_t *)arg,
sizeof(blit) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( blit, (drm_r128_blit_t *) data,
sizeof(blit) );
DRM_DEBUG( "%s: pid=%d index=%d\n",
__FUNCTION__, current->pid, blit.idx );
DRM_DEBUG( "pid=%d index=%d\n", DRM_OS_CURRENTPID, blit.idx );
if ( blit.idx < 0 || blit.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
blit.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1460,19 +1440,16 @@ int r128_cce_blit( struct inode *inode, struct file *filp,
return r128_cce_dispatch_blit( dev, &blit );
}
int r128_cce_depth( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_depth( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_depth_t depth;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &depth, (drm_r128_depth_t *)arg,
sizeof(depth) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( depth, (drm_r128_depth_t *) data,
sizeof(depth) );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1487,27 +1464,24 @@ int r128_cce_depth( struct inode *inode, struct file *filp,
return r128_cce_dispatch_read_pixels( dev, &depth );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
int r128_cce_stipple( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_stipple( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_stipple_t stipple;
u32 mask[32];
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stipple, (drm_r128_stipple_t *)arg,
sizeof(stipple) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( stipple, (drm_r128_stipple_t *) data,
sizeof(stipple) );
if ( copy_from_user( &mask, stipple.mask,
if ( DRM_OS_COPYFROMUSR( &mask, stipple.mask,
32 * sizeof(u32) ) )
return -EFAULT;
return DRM_OS_ERR( EFAULT );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1516,11 +1490,9 @@ int r128_cce_stipple( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_indirect( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1533,13 +1505,12 @@ int r128_cce_indirect( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &indirect, (drm_r128_indirect_t *)arg,
sizeof(indirect) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( indirect, (drm_r128_indirect_t *) data,
sizeof(indirect) );
DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
indirect.idx, indirect.start,
@ -1548,26 +1519,26 @@ int r128_cce_indirect( struct inode *inode, struct file *filp,
if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
indirect.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf = dma->buflist[indirect.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( indirect.start < buf->used ) {
DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
indirect.start, buf->used );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );

197
shared/r128_cce.c
View file

@ -28,19 +28,14 @@
* Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
#include "r128.h"
#include "drmP.h"
#include "drm.h"
#include "r128_drm.h"
#include "r128_drv.h"
#include <linux/interrupt.h> /* For task queue support */
#include <linux/delay.h>
#define R128_FIFO_DEBUG 0
/* CCE microcode (from ATI) */
static u32 r128_cce_microcode[] = {
0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0,
@ -86,6 +81,7 @@ static u32 r128_cce_microcode[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
int r128_do_wait_for_idle( drm_r128_private_t *dev_priv );
int R128_READ_PLL(drm_device_t *dev, int addr)
{
@ -130,13 +126,13 @@ static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv )
if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) {
return 0;
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
@ -146,13 +142,13 @@ static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK;
if ( slots >= entries ) return 0;
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
@ -160,20 +156,20 @@ int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
int i, ret;
ret = r128_do_wait_for_fifo( dev_priv, 64 );
if ( ret < 0 ) return ret;
if ( ret ) return ret;
for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) {
r128_do_pixcache_flush( dev_priv );
return 0;
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "%s failed!\n", __FUNCTION__ );
DRM_ERROR( "failed!\n" );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
@ -186,7 +182,7 @@ static void r128_cce_load_microcode( drm_r128_private_t *dev_priv )
{
int i;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
r128_do_wait_for_idle( dev_priv );
@ -227,14 +223,14 @@ int r128_do_cce_idle( drm_r128_private_t *dev_priv )
return r128_do_pixcache_flush( dev_priv );
}
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
#if R128_FIFO_DEBUG
DRM_ERROR( "failed!\n" );
r128_status( dev_priv );
#endif
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
/* Start the Concurrent Command Engine.
@ -322,7 +318,7 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev,
u32 ring_start;
u32 tmp;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
/* The manual (p. 2) says this address is in "VM space". This
* means it's an offset from the start of AGP space.
@ -377,13 +373,12 @@ static void r128_cce_init_ring_buffer( drm_device_t *dev,
static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
{
drm_r128_private_t *dev_priv;
struct list_head *list;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
if ( dev_priv == NULL )
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
memset( dev_priv, 0, sizeof(drm_r128_private_t) );
@ -393,7 +388,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR( "PCI GART memory not allocated!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
dev_priv->usec_timeout = init->usec_timeout;
@ -402,7 +397,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_DEBUG( "TIMEOUT problem!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
dev_priv->cce_mode = init->cce_mode;
@ -422,7 +417,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_DEBUG( "Bad cce_mode!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
switch ( init->cce_mode ) {
@ -484,20 +479,13 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
(dev_priv->span_offset >> 5));
list_for_each(list, &dev->maplist->head) {
drm_map_list_t *r_list = (drm_map_list_t *)list;
if( r_list->map &&
r_list->map->type == _DRM_SHM &&
r_list->map->flags & _DRM_CONTAINS_LOCK ) {
dev_priv->sarea = r_list->map;
break;
}
}
DRM_OS_GETSAREA();
if(!dev_priv->sarea) {
DRM_ERROR("could not find sarea!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->fb, init->fb_offset );
@ -505,35 +493,35 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("could not find framebuffer!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
if(!dev_priv->mmio) {
DRM_ERROR("could not find mmio region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
if(!dev_priv->cce_ring) {
DRM_ERROR("could not find cce ring region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
if(!dev_priv->ring_rptr) {
DRM_ERROR("could not find ring read pointer!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
if(!dev_priv->buffers) {
DRM_ERROR("could not find dma buffer region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( !dev_priv->is_pci ) {
@ -543,7 +531,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("could not find agp texture region!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
}
@ -561,7 +549,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
DRM_ERROR("Could not ioremap agp regions!\n");
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
} else {
dev_priv->cce_ring->handle =
@ -599,16 +587,18 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
R128_WRITE( R128_LAST_DISPATCH_REG,
dev_priv->sarea_priv->last_dispatch );
#if __REALLY_HAVE_SG
if ( dev_priv->is_pci ) {
if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
&dev_priv->bus_pci_gart) ) {
DRM_ERROR( "failed to init PCI GART!\n" );
dev->dev_private = (void *)dev_priv;
r128_do_cleanup_cce( dev );
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart );
}
#endif
r128_cce_init_ring_buffer( dev, dev_priv );
r128_cce_load_microcode( dev_priv );
@ -625,16 +615,20 @@ int r128_do_cleanup_cce( drm_device_t *dev )
if ( dev->dev_private ) {
drm_r128_private_t *dev_priv = dev->dev_private;
#if __REALLY_HAVE_SG
if ( !dev_priv->is_pci ) {
#endif
DRM_IOREMAPFREE( dev_priv->cce_ring );
DRM_IOREMAPFREE( dev_priv->ring_rptr );
DRM_IOREMAPFREE( dev_priv->buffers );
#if __REALLY_HAVE_SG
} else {
if (!DRM(ati_pcigart_cleanup)( dev,
dev_priv->phys_pci_gart,
dev_priv->bus_pci_gart ))
DRM_ERROR( "failed to cleanup PCI GART!\n" );
}
#endif
DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
DRM_MEM_DRIVER );
@ -644,17 +638,14 @@ int r128_do_cleanup_cce( drm_device_t *dev )
return 0;
}
int r128_cce_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_init( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_init_t init;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
if ( copy_from_user( &init, (drm_r128_init_t *)arg, sizeof(init) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( init, (drm_r128_init_t *)data, sizeof(init) );
switch ( init.func ) {
case R128_INIT_CCE:
@ -663,21 +654,19 @@ int r128_cce_init( struct inode *inode, struct file *filp,
return r128_do_cleanup_cce( dev );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
int r128_cce_start( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_start( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) {
DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ );
DRM_DEBUG( "%s while CCE running\n", __func__ );
return 0;
}
@ -689,20 +678,17 @@ int r128_cce_start( struct inode *inode, struct file *filp,
/* Stop the CCE. The engine must have been idled before calling this
* routine.
*/
int r128_cce_stop( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_stop( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_cce_stop_t stop;
int ret;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stop, (drm_r128_init_t *)arg, sizeof(stop) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR(stop, (drm_r128_cce_stop_t *)data, sizeof(stop) );
/* Flush any pending CCE commands. This ensures any outstanding
* commands are exectuted by the engine before we turn it off.
@ -716,7 +702,7 @@ int r128_cce_stop( struct inode *inode, struct file *filp,
*/
if ( stop.idle ) {
ret = r128_do_cce_idle( dev_priv );
if ( ret < 0 ) return ret;
if ( ret ) return ret;
}
/* Finally, we can turn off the CCE. If the engine isn't idle,
@ -733,19 +719,17 @@ int r128_cce_stop( struct inode *inode, struct file *filp,
/* Just reset the CCE ring. Called as part of an X Server engine reset.
*/
int r128_cce_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_reset( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
return -EINVAL;
DRM_DEBUG( "%s called before init done\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
r128_do_cce_reset( dev_priv );
@ -756,13 +740,11 @@ int r128_cce_reset( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_idle( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_idle( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
@ -773,12 +755,10 @@ int r128_cce_idle( struct inode *inode, struct file *filp,
return r128_do_cce_idle( dev_priv );
}
int r128_engine_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_engine_reset( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_OS_DEVICE;
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
@ -793,7 +773,7 @@ int r128_engine_reset( struct inode *inode, struct file *filp,
static int r128_do_init_pageflip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
dev_priv->crtc_offset = R128_READ( R128_CRTC_OFFSET );
dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
@ -811,7 +791,7 @@ static int r128_do_init_pageflip( drm_device_t *dev )
int r128_do_cleanup_pageflip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
R128_WRITE( R128_CRTC_OFFSET, dev_priv->crtc_offset );
R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
@ -822,17 +802,14 @@ int r128_do_cleanup_pageflip( drm_device_t *dev )
return 0;
}
int r128_fullscreen( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_fullscreen( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_fullscreen_t fs;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &fs, (drm_r128_fullscreen_t *)arg, sizeof(fs) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( fs, (drm_r128_fullscreen_t *)data, sizeof(fs) );
switch ( fs.func ) {
case R128_INIT_FULLSCREEN:
@ -841,7 +818,7 @@ int r128_fullscreen( struct inode *inode, struct file *filp,
return r128_do_cleanup_pageflip( dev );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
@ -930,7 +907,7 @@ drm_buf_t *r128_freelist_get( drm_device_t *dev )
return buf;
}
}
udelay( 1 );
DRM_OS_DELAY( 1 );
}
DRM_ERROR( "returning NULL!\n" );
@ -963,12 +940,12 @@ int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
r128_update_ring_snapshot( ring );
if ( ring->space >= n )
return 0;
udelay( 1 );
DRM_OS_DELAY( 1 );
}
/* FIXME: This is being ignored... */
DRM_ERROR( "failed!\n" );
return -EBUSY;
return DRM_OS_ERR(EBUSY);
}
static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d )
@ -978,50 +955,47 @@ static int r128_cce_get_buffers( drm_device_t *dev, drm_dma_t *d )
for ( i = d->granted_count ; i < d->request_count ; i++ ) {
buf = r128_freelist_get( dev );
if ( !buf ) return -EAGAIN;
if ( !buf ) return DRM_OS_ERR(EAGAIN);
buf->pid = current->pid;
buf->pid = DRM_OS_CURRENTPID;
if ( copy_to_user( &d->request_indices[i], &buf->idx,
if ( DRM_OS_COPYTOUSR( &d->request_indices[i], &buf->idx,
sizeof(buf->idx) ) )
return -EFAULT;
if ( copy_to_user( &d->request_sizes[i], &buf->total,
return DRM_OS_ERR(EFAULT);
if ( DRM_OS_COPYTOUSR( &d->request_sizes[i], &buf->total,
sizeof(buf->total) ) )
return -EFAULT;
return DRM_OS_ERR(EFAULT);
d->granted_count++;
}
return 0;
}
int r128_cce_buffers( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_buffers( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_device_dma_t *dma = dev->dma;
int ret = 0;
drm_dma_t d;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &d, (drm_dma_t *) arg, sizeof(d) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( d, (drm_dma_t *) data, sizeof(d) );
/* Please don't send us buffers.
*/
if ( d.send_count != 0 ) {
DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
current->pid, d.send_count );
return -EINVAL;
DRM_OS_CURRENTPID, d.send_count );
return DRM_OS_ERR(EINVAL);
}
/* We'll send you buffers.
*/
if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
current->pid, d.request_count, dma->buf_count );
return -EINVAL;
DRM_OS_CURRENTPID, d.request_count, dma->buf_count );
return DRM_OS_ERR(EINVAL);
}
d.granted_count = 0;
@ -1030,8 +1004,7 @@ int r128_cce_buffers( struct inode *inode, struct file *filp,
ret = r128_cce_get_buffers( dev, &d );
}
if ( copy_to_user( (drm_dma_t *) arg, &d, sizeof(d) ) )
return -EFAULT;
DRM_OS_KRNTOUSR((drm_dma_t *) data, d, sizeof(d) );
return ret;
}

80
shared/r128_drv.h
View file

@ -34,8 +34,8 @@
#ifndef __R128_DRV_H__
#define __R128_DRV_H__
#define GET_RING_HEAD(ring) readl( (volatile u32 *) (ring)->head )
#define SET_RING_HEAD(ring,val) writel( (val), (volatile u32 *) (ring)->head )
#define GET_RING_HEAD(ring) DRM_OS_READ32( (volatile u32 *) (ring)->head )
#define SET_RING_HEAD(ring,val) DRM_OS_WRITE32( (volatile u32 *) (ring)->head, (val) )
typedef struct drm_r128_freelist {
unsigned int age;
@ -116,29 +116,21 @@ typedef struct drm_r128_buf_priv {
} drm_r128_buf_priv_t;
/* r128_cce.c */
extern int r128_cce_init( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_start( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_stop( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_idle( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_engine_reset( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_fullscreen( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_buffers( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_init( DRM_OS_IOCTL );
extern int r128_cce_start( DRM_OS_IOCTL );
extern int r128_cce_stop( DRM_OS_IOCTL );
extern int r128_cce_reset( DRM_OS_IOCTL );
extern int r128_cce_idle( DRM_OS_IOCTL );
extern int r128_engine_reset( DRM_OS_IOCTL );
extern int r128_fullscreen( DRM_OS_IOCTL );
extern int r128_cce_buffers( DRM_OS_IOCTL );
extern void r128_freelist_reset( drm_device_t *dev );
extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
static inline void
static __inline__ void
r128_update_ring_snapshot( drm_r128_ring_buffer_t *ring )
{
ring->space = (GET_RING_HEAD( ring ) - ring->tail) * sizeof(u32);
@ -151,22 +143,14 @@ extern int r128_do_cleanup_cce( drm_device_t *dev );
extern int r128_do_cleanup_pageflip( drm_device_t *dev );
/* r128_state.c */
extern int r128_cce_clear( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_swap( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_blit( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_depth( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_stipple( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg );
extern int r128_cce_clear( DRM_OS_IOCTL );
extern int r128_cce_swap( DRM_OS_IOCTL );
extern int r128_cce_vertex( DRM_OS_IOCTL );
extern int r128_cce_indices( DRM_OS_IOCTL );
extern int r128_cce_blit( DRM_OS_IOCTL );
extern int r128_cce_depth( DRM_OS_IOCTL );
extern int r128_cce_stipple( DRM_OS_IOCTL );
extern int r128_cce_indirect( DRM_OS_IOCTL );
/* Register definitions, register access macros and drmAddMap constants
@ -384,11 +368,11 @@ extern int r128_cce_indirect( struct inode *inode, struct file *filp,
#define R128_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
#define R128_ADDR(reg) (R128_BASE( reg ) + reg)
#define R128_READ(reg) readl( (volatile u32 *) R128_ADDR(reg) )
#define R128_WRITE(reg,val) writel( (val), (volatile u32 *) R128_ADDR(reg) )
#define R128_READ(reg) DRM_OS_READ32( (volatile u32 *) R128_ADDR(reg) )
#define R128_WRITE(reg,val) DRM_OS_WRITE32( (volatile u32 *) R128_ADDR(reg), (val) )
#define R128_READ8(reg) readb( (volatile u8 *) R128_ADDR(reg) )
#define R128_WRITE8(reg,val) writeb( (val), (volatile u8 *) R128_ADDR(reg) )
#define R128_READ8(reg) DRM_OS_READ8( (volatile u8 *) R128_ADDR(reg) )
#define R128_WRITE8(reg,val) DRM_OS_WRITE8( (volatile u8 *) R128_ADDR(reg), (val) )
#define R128_WRITE_PLL(addr,val) \
do { \
@ -416,10 +400,9 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
#define LOCK_TEST_WITH_RETURN( dev ) \
do { \
if ( !_DRM_LOCK_IS_HELD( dev->lock.hw_lock->lock ) || \
dev->lock.pid != current->pid ) { \
DRM_ERROR( "%s called without lock held\n", \
__FUNCTION__ ); \
return -EINVAL; \
dev->lock.pid != DRM_OS_CURRENTPID ) { \
DRM_ERROR( "%s called without lock held\n", __func__ ); \
return DRM_OS_ERR(EINVAL); \
} \
} while (0)
@ -431,12 +414,13 @@ do { \
r128_update_ring_snapshot( ring ); \
if ( ring->space >= ring->high_mark ) \
goto __ring_space_done; \
udelay( 1 ); \
DRM_OS_DELAY(1); \
} \
DRM_ERROR( "ring space check failed!\n" ); \
return -EBUSY; \
return DRM_OS_ERR(EBUSY); \
} \
__ring_space_done: \
; \
} while (0)
#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
@ -444,7 +428,7 @@ do { \
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \
int __ret = r128_do_cce_idle( dev_priv ); \
if ( __ret < 0 ) return __ret; \
if ( __ret ) return __ret; \
sarea_priv->last_dispatch = 0; \
r128_freelist_reset( dev ); \
} \
@ -463,7 +447,7 @@ do { \
#if defined(__powerpc__)
#define r128_flush_write_combine() (void) GET_RING_HEAD( &dev_priv->ring )
#else
#define r128_flush_write_combine() mb()
#define r128_flush_write_combine() DRM_OS_READMEMORYBARRIER
#endif
@ -475,7 +459,7 @@ do { \
#define BEGIN_RING( n ) do { \
if ( R128_VERBOSE ) { \
DRM_INFO( "BEGIN_RING( %d ) in %s\n", \
(n), __FUNCTION__ ); \
(n), __func__ ); \
} \
if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \

373
shared/r128_state.c
View file

@ -27,14 +27,11 @@
* Gareth Hughes <gareth@valinux.com>
*/
#define __NO_VERSION__
#include "r128.h"
#include "drmP.h"
#include "drm.h"
#include "r128_drm.h"
#include "r128_drv.h"
#include "drm.h"
#include <linux/delay.h>
/* ================================================================
@ -46,7 +43,7 @@ static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
{
u32 aux_sc_cntl = 0x00000000;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 17 );
@ -84,12 +81,12 @@ static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
ADVANCE_RING();
}
static inline void r128_emit_core( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 2 );
@ -99,12 +96,12 @@ static inline void r128_emit_core( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_context( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 13 );
@ -125,12 +122,12 @@ static inline void r128_emit_context( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_setup( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 3 );
@ -141,12 +138,12 @@ static inline void r128_emit_setup( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_masks( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 5 );
@ -160,12 +157,12 @@ static inline void r128_emit_masks( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_window( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 2 );
@ -175,14 +172,14 @@ static inline void r128_emit_window( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_tex0( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0];
int i;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS );
@ -202,13 +199,13 @@ static inline void r128_emit_tex0( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_tex1( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
int i;
RING_LOCALS;
DRM_DEBUG( " %s\n", __FUNCTION__ );
DRM_DEBUG( " %s\n", __func__ );
BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS );
@ -226,12 +223,12 @@ static inline void r128_emit_tex1( drm_r128_private_t *dev_priv )
ADVANCE_RING();
}
static inline void r128_emit_state( drm_r128_private_t *dev_priv )
static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv )
{
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
unsigned int dirty = sarea_priv->dirty;
DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty );
DRM_DEBUG( "%s: dirty=0x%08x\n", __func__, dirty );
if ( dirty & R128_UPLOAD_CORE ) {
r128_emit_core( dev_priv );
@ -372,7 +369,7 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
unsigned int flags = clear->flags;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
unsigned int tmp = flags;
@ -475,7 +472,7 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
drm_clip_rect_t *pbox = sarea_priv->boxes;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
@ -531,7 +528,7 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
{
drm_r128_private_t *dev_priv = dev->dev_private;
RING_LOCALS;
DRM_DEBUG( "%s: page=%d\n", __FUNCTION__, dev_priv->current_page );
DRM_DEBUG( "page=%d\n", dev_priv->current_page );
#if R128_PERFORMANCE_BOXES
/* Do some trivial performance monitoring...
@ -580,8 +577,7 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
int prim = buf_priv->prim;
int i = 0;
RING_LOCALS;
DRM_DEBUG( "%s: buf=%d nbox=%d\n",
__FUNCTION__, buf->idx, sarea_priv->nbox );
DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox );
if ( 0 )
r128_print_dirty( "dispatch_vertex", sarea_priv->dirty );
@ -792,7 +788,7 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
u32 *data;
int dword_shift, dwords;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
/* The compiler won't optimize away a division by a variable,
* even if the only legal values are powers of two. Thus, we'll
@ -813,7 +809,7 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
break;
default:
DRM_ERROR( "invalid blit format %d\n", blit->format );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
/* Flush the pixel cache, and mark the contents as Read Invalid.
@ -833,14 +829,14 @@ static int r128_cce_dispatch_blit( drm_device_t *dev,
buf = dma->buflist[blit->idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", blit->idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf_priv->discard = 1;
@ -902,36 +898,36 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
u8 *mask;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) {
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( &y, depth->y, sizeof(y) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) {
return DRM_OS_ERR(EFAULT);
}
buffer = kmalloc( depth->n * sizeof(u32), GFP_KERNEL );
buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) );
if ( buffer == NULL )
return -ENOMEM;
if ( copy_from_user( buffer, depth->buffer,
return DRM_OS_ERR(ENOMEM);
if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer,
depth->n * sizeof(u32) ) ) {
kfree( buffer );
return -EFAULT;
DRM_OS_FREE( buffer );
return DRM_OS_ERR(EFAULT);
}
if ( depth->mask ) {
mask = kmalloc( depth->n * sizeof(u8), GFP_KERNEL );
mask = DRM_OS_MALLOC( depth->n * sizeof(u8) );
if ( mask == NULL ) {
kfree( buffer );
return -ENOMEM;
DRM_OS_FREE( buffer );
return DRM_OS_ERR(ENOMEM;)
}
if ( copy_from_user( mask, depth->mask,
if ( DRM_OS_COPYFROMUSR( mask, depth->mask,
depth->n * sizeof(u8) ) ) {
kfree( buffer );
kfree( mask );
return -EFAULT;
DRM_OS_FREE( buffer );
DRM_OS_FREE( mask );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++, x++ ) {
@ -957,7 +953,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
}
}
kfree( mask );
DRM_OS_FREE( mask );
} else {
for ( i = 0 ; i < count ; i++, x++ ) {
BEGIN_RING( 6 );
@ -981,7 +977,7 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
}
}
kfree( buffer );
DRM_OS_FREE( buffer );
return 0;
}
@ -995,59 +991,59 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
u8 *mask;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
x = kmalloc( count * sizeof(*x), GFP_KERNEL );
x = DRM_OS_MALLOC( count * sizeof(*x) );
if ( x == NULL ) {
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
y = kmalloc( count * sizeof(*y), GFP_KERNEL );
y = DRM_OS_MALLOC( count * sizeof(*y) );
if ( y == NULL ) {
kfree( x );
return -ENOMEM;
DRM_OS_FREE( x );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( x, depth->x, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( y, depth->y, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
buffer = kmalloc( depth->n * sizeof(u32), GFP_KERNEL );
buffer = DRM_OS_MALLOC( depth->n * sizeof(u32) );
if ( buffer == NULL ) {
kfree( x );
kfree( y );
return -ENOMEM;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( buffer, depth->buffer,
if ( DRM_OS_COPYFROMUSR( buffer, depth->buffer,
depth->n * sizeof(u32) ) ) {
kfree( x );
kfree( y );
kfree( buffer );
return -EFAULT;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return DRM_OS_ERR(EFAULT);
}
if ( depth->mask ) {
mask = kmalloc( depth->n * sizeof(u8), GFP_KERNEL );
mask = DRM_OS_MALLOC( depth->n * sizeof(u8) );
if ( mask == NULL ) {
kfree( x );
kfree( y );
kfree( buffer );
return -ENOMEM;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( mask, depth->mask,
if ( DRM_OS_COPYFROMUSR( mask, depth->mask,
depth->n * sizeof(u8) ) ) {
kfree( x );
kfree( y );
kfree( buffer );
kfree( mask );
return -EFAULT;
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
DRM_OS_FREE( mask );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++ ) {
@ -1073,7 +1069,7 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
}
}
kfree( mask );
DRM_OS_FREE( mask );
} else {
for ( i = 0 ; i < count ; i++ ) {
BEGIN_RING( 6 );
@ -1097,9 +1093,9 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
}
}
kfree( x );
kfree( y );
kfree( buffer );
DRM_OS_FREE( x );
DRM_OS_FREE( y );
DRM_OS_FREE( buffer );
return 0;
}
@ -1110,14 +1106,14 @@ static int r128_cce_dispatch_read_span( drm_device_t *dev,
drm_r128_private_t *dev_priv = dev->dev_private;
int count, x, y;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
count = depth->n;
if ( copy_from_user( &x, depth->x, sizeof(x) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &x, depth->x, sizeof(x) ) ) {
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( &y, depth->y, sizeof(y) ) ) {
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( &y, depth->y, sizeof(y) ) ) {
return DRM_OS_ERR(EFAULT);
}
BEGIN_RING( 7 );
@ -1152,31 +1148,31 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
int count, *x, *y;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
count = depth->n;
if ( count > dev_priv->depth_pitch ) {
count = dev_priv->depth_pitch;
}
x = kmalloc( count * sizeof(*x), GFP_KERNEL );
x = DRM_OS_MALLOC( count * sizeof(*x) );
if ( x == NULL ) {
return -ENOMEM;
return DRM_OS_ERR(ENOMEM);
}
y = kmalloc( count * sizeof(*y), GFP_KERNEL );
y = DRM_OS_MALLOC( count * sizeof(*y) );
if ( y == NULL ) {
kfree( x );
return -ENOMEM;
DRM_OS_FREE( x );
return DRM_OS_ERR(ENOMEM);
}
if ( copy_from_user( x, depth->x, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( x, depth->x, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
if ( copy_from_user( y, depth->y, count * sizeof(int) ) ) {
kfree( x );
kfree( y );
return -EFAULT;
if ( DRM_OS_COPYFROMUSR( y, depth->y, count * sizeof(int) ) ) {
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return DRM_OS_ERR(EFAULT);
}
for ( i = 0 ; i < count ; i++ ) {
@ -1203,8 +1199,8 @@ static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
ADVANCE_RING();
}
kfree( x );
kfree( y );
DRM_OS_FREE( x );
DRM_OS_FREE( y );
return 0;
}
@ -1219,7 +1215,7 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
drm_r128_private_t *dev_priv = dev->dev_private;
int i;
RING_LOCALS;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
BEGIN_RING( 33 );
@ -1236,21 +1232,18 @@ static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
* IOCTL functions
*/
int r128_cce_clear( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_clear( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
drm_r128_clear_t clear;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "\n" );
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &clear, (drm_r128_clear_t *) arg,
sizeof(clear) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( clear, (drm_r128_clear_t *) data,
sizeof(clear) );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1266,14 +1259,12 @@ int r128_cce_clear( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_swap( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_swap( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
DRM_DEBUG( "%s\n", __FUNCTION__ );
DRM_DEBUG( "%s\n", __func__ );
LOCK_TEST_WITH_RETURN( dev );
@ -1293,11 +1284,9 @@ int r128_cce_swap( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_vertex( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_vertex( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1307,27 +1296,26 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &vertex, (drm_r128_vertex_t *)arg,
sizeof(vertex) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( vertex, (drm_r128_vertex_t *) data,
sizeof(vertex) );
DRM_DEBUG( "%s: pid=%d index=%d count=%d discard=%d\n",
__FUNCTION__, current->pid,
DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
DRM_OS_CURRENTPID,
vertex.idx, vertex.count, vertex.discard );
if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
vertex.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( vertex.prim < 0 ||
vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
DRM_ERROR( "buffer prim %d\n", vertex.prim );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1336,14 +1324,14 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
buf = dma->buflist[vertex.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf->used = vertex.count;
@ -1355,11 +1343,9 @@ int r128_cce_vertex( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_indices( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_indices( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1370,27 +1356,25 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &elts, (drm_r128_indices_t *)arg,
sizeof(elts) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( elts, (drm_r128_indices_t *) data,
sizeof(elts) );
DRM_DEBUG( "%s: pid=%d buf=%d s=%d e=%d d=%d\n",
__FUNCTION__, current->pid,
DRM_DEBUG( "pid=%d buf=%d s=%d e=%d d=%d\n", DRM_OS_CURRENTPID,
elts.idx, elts.start, elts.end, elts.discard );
if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
elts.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( elts.prim < 0 ||
elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
DRM_ERROR( "buffer prim %d\n", elts.prim );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1399,14 +1383,14 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
buf = dma->buflist[elts.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", elts.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
count = (elts.end - elts.start) / sizeof(u16);
@ -1414,11 +1398,11 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
if ( elts.start & 0x7 ) {
DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( elts.start < buf->used ) {
DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf->used = elts.end;
@ -1430,28 +1414,24 @@ int r128_cce_indices( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_blit( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_blit( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_device_dma_t *dma = dev->dma;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_blit_t blit;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &blit, (drm_r128_blit_t *)arg,
sizeof(blit) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( blit, (drm_r128_blit_t *) data,
sizeof(blit) );
DRM_DEBUG( "%s: pid=%d index=%d\n",
__FUNCTION__, current->pid, blit.idx );
DRM_DEBUG( "pid=%d index=%d\n", DRM_OS_CURRENTPID, blit.idx );
if ( blit.idx < 0 || blit.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
blit.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1460,19 +1440,16 @@ int r128_cce_blit( struct inode *inode, struct file *filp,
return r128_cce_dispatch_blit( dev, &blit );
}
int r128_cce_depth( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_depth( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_depth_t depth;
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &depth, (drm_r128_depth_t *)arg,
sizeof(depth) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( depth, (drm_r128_depth_t *) data,
sizeof(depth) );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1487,27 +1464,24 @@ int r128_cce_depth( struct inode *inode, struct file *filp,
return r128_cce_dispatch_read_pixels( dev, &depth );
}
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
int r128_cce_stipple( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_stipple( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_r128_stipple_t stipple;
u32 mask[32];
LOCK_TEST_WITH_RETURN( dev );
if ( copy_from_user( &stipple, (drm_r128_stipple_t *)arg,
sizeof(stipple) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( stipple, (drm_r128_stipple_t *) data,
sizeof(stipple) );
if ( copy_from_user( &mask, stipple.mask,
if ( DRM_OS_COPYFROMUSR( &mask, stipple.mask,
32 * sizeof(u32) ) )
return -EFAULT;
return DRM_OS_ERR( EFAULT );
RING_SPACE_TEST_WITH_RETURN( dev_priv );
@ -1516,11 +1490,9 @@ int r128_cce_stipple( struct inode *inode, struct file *filp,
return 0;
}
int r128_cce_indirect( struct inode *inode, struct file *filp,
unsigned int cmd, unsigned long arg )
int r128_cce_indirect( DRM_OS_IOCTL )
{
drm_file_t *priv = filp->private_data;
drm_device_t *dev = priv->dev;
DRM_OS_DEVICE;
drm_r128_private_t *dev_priv = dev->dev_private;
drm_device_dma_t *dma = dev->dma;
drm_buf_t *buf;
@ -1533,13 +1505,12 @@ int r128_cce_indirect( struct inode *inode, struct file *filp,
LOCK_TEST_WITH_RETURN( dev );
if ( !dev_priv ) {
DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
return -EINVAL;
DRM_ERROR( "%s called with no initialization\n", __func__ );
return DRM_OS_ERR(EINVAL);
}
if ( copy_from_user( &indirect, (drm_r128_indirect_t *)arg,
sizeof(indirect) ) )
return -EFAULT;
DRM_OS_KRNFROMUSR( indirect, (drm_r128_indirect_t *) data,
sizeof(indirect) );
DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
indirect.idx, indirect.start,
@ -1548,26 +1519,26 @@ int r128_cce_indirect( struct inode *inode, struct file *filp,
if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
DRM_ERROR( "buffer index %d (of %d max)\n",
indirect.idx, dma->buf_count - 1 );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
buf = dma->buflist[indirect.idx];
buf_priv = buf->dev_private;
if ( buf->pid != current->pid ) {
if ( buf->pid != DRM_OS_CURRENTPID ) {
DRM_ERROR( "process %d using buffer owned by %d\n",
current->pid, buf->pid );
return -EINVAL;
DRM_OS_CURRENTPID, buf->pid );
return DRM_OS_ERR(EINVAL);
}
if ( buf->pending ) {
DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
if ( indirect.start < buf->used ) {
DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
indirect.start, buf->used );
return -EINVAL;
return DRM_OS_ERR(EINVAL);
}
RING_SPACE_TEST_WITH_RETURN( dev_priv );