mirror of
https://gitlab.freedesktop.org/mesa/drm.git
synced 2025-12-20 07:00:11 +01:00
- Merge trunk into ati-5-0-0 branch
This commit is contained in:
Kevin E Martin
parent
71897876f1
commit
0885a6be6d
18 changed files with 317 additions and 121 deletions
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@ -6,6 +6,7 @@
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# drm.o is a fake target -- it is never built
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# The real targets are in the module-list
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O_TARGET := drm.o
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module-list := gamma.o tdfx.o r128.o radeon.o ffb.o mga.o i810.o
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export-objs := $(patsubst %.o,%_drv.o,$(module-list))
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@ -25,6 +26,11 @@ export-objs := $(patsubst %.o,%_drv.o,$(module-list))
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# memory waste (in the dual-head case) for greatly improved long-term
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# maintainability.
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#
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# NOTE: lib-objs will be eliminated in future versions, thereby
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# eliminating the need to compile the .o files into every module, but
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# for now we still need them.
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#
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lib-objs := init.o memory.o proc.o auth.o context.o drawable.o bufs.o
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lib-objs += lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o
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@ -32,65 +38,71 @@ ifeq ($(CONFIG_AGP),y)
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lib-objs += agpsupport.o
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else
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ifeq ($(CONFIG_AGP),m)
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lib-objs += agpsupport.o
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lib-objs += agpsupport.o
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endif
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endif
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gamma-objs := $(lib-objs) gamma_drv.o gamma_dma.o
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tdfx-objs := $(lib-objs) tdfx_drv.o tdfx_context.o
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r128-objs := $(lib-objs) r128_drv.o r128_cce.o r128_context.o \
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r128_bufs.o r128_state.o
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radeon-objs := $(lib-objs) radeon_drv.o radeon_cp.o radeon_context.o \
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radeon_bufs.o radeon_state.o
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ffb-objs := $(lib-objs) ffb_drv.o ffb_context.o
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mga-objs := $(lib-objs) mga_drv.o mga_dma.o mga_context.o \
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mga_bufs.o mga_state.o
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i810-objs := $(lib-objs) i810_drv.o i810_dma.o i810_context.o \
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i810_bufs.o
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gamma-objs := gamma_drv.o gamma_dma.o
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tdfx-objs := tdfx_drv.o tdfx_context.o
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r128-objs := r128_drv.o r128_cce.o r128_context.o r128_bufs.o \
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r128_state.o
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radeon-objs := radeon_drv.o radeon_cp.o radeon_context.o radeon_bufs.o \
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radeon_state.o
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ffb-objs := ffb_drv.o ffb_context.o
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mga-objs := mga_drv.o mga_dma.o mga_context.o mga_bufs.o \
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mga_state.o
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i810-objs := i810_drv.o i810_dma.o i810_context.o i810_bufs.o
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obj-$(CONFIG_DRM_GAMMA) += gamma.o $(gamma-objs)
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obj-$(CONFIG_DRM_TDFX) += tdfx.o $(tdfx-objs)
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obj-$(CONFIG_DRM_R128) += r128.o $(r128-objs)
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obj-$(CONFIG_DRM_RADEON) += radeon.o $(radeon-objs)
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obj-$(CONFIG_DRM_FFB) += ffb.o $(ffb-objs)
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obj-$(CONFIG_DRM_GAMMA) += gamma.o
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obj-$(CONFIG_DRM_TDFX) += tdfx.o
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obj-$(CONFIG_DRM_R128) += r128.o
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obj-$(CONFIG_DRM_RADEON) += radeon.o
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obj-$(CONFIG_DRM_FFB) += ffb.o
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obj-$(CONFIG_DRM_MGA) += mga.o
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obj-$(CONFIG_DRM_I810) += i810.o
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ifneq ($CONFIG_AGP),)
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obj-$(CONFIG_DRM_MGA) += mga.o $(mga-objs)
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obj-$(CONFIG_DRM_I810) += i810.o $(i810-objs)
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# When linking into the kernel, link the library just once.
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# If making modules, we include the library into each module
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lib-objs-mod := $(patsubst %.o,%-mod.o,$(lib-objs))
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ifdef MAKING_MODULES
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lib = drmlib-mod.a
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else
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obj-y += drmlib.a
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endif
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# Take module names out of obj-y and int-m
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obj-y := $(filter-out $(module-list), $(obj-y))
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int-m := $(filter-out $(module-list), $(obj-m))
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# Translate to Rules.make lists.
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O_OBJS := $(filter-out $(export-objs), $(obj-y))
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OX_OBJS := $(filter $(export-objs), $(obj-y))
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M_OBJS := $(sort $(filter $(module-list), $(obj-m)))
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MI_OBJS := $(sort $(filter-out $(export-objs), $(int-m)))
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MIX_OBJS := $(sort $(filter $(export-objs), $(int-m)))
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include $(TOPDIR)/Rules.make
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gamma.o: $(gamma-objs)
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$(LD) -r -o $@ $(gamma-objs)
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$(patsubst %.o,%.c,$(lib-objs-mod)):
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@ln -sf $(subst -mod,,$@) $@
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tdfx.o: $(tdfx-objs)
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$(LD) -r -o $@ $(tdfx-objs)
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drmlib-mod.a: $(lib-objs-mod)
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rm -f $@
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$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs-mod)
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mga.o: $(mga-objs)
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$(LD) -r -o $@ $(mga-objs)
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drmlib.a: $(lib-objs)
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rm -f $@
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$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs)
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i810.o: $(i810-objs)
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$(LD) -r -o $@ $(i810-objs)
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gamma.o: $(gamma-objs) $(lib)
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$(LD) -r -o $@ $(gamma-objs) $(lib)
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r128.o: $(r128-objs)
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$(LD) -r -o $@ $(r128-objs)
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tdfx.o: $(tdfx-objs) $(lib)
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$(LD) -r -o $@ $(tdfx-objs) $(lib)
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radeon.o: $(radeon-objs)
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$(LD) -r -o $@ $(radeon-objs)
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mga.o: $(mga-objs) $(lib)
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$(LD) -r -o $@ $(mga-objs) $(lib)
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ffb.o: $(ffb-objs)
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$(LD) -r -o $@ $(ffb-objs)
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i810.o: $(i810-objs) $(lib)
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$(LD) -r -o $@ $(i810-objs) $(lib)
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r128.o: $(r128-objs) $(lib)
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$(LD) -r -o $@ $(r128-objs) $(lib)
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radeon.o: $(radeon-objs) $(lib)
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$(LD) -r -o $@ $(radeon-objs) $(lib)
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ffb.o: $(ffb-objs) $(lib)
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$(LD) -r -o $@ $(ffb-objs) $(lib)
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@ -924,7 +924,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
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dev->dma->next_queue = NULL;
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dev->dma->this_buffer = NULL;
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dev->tq.next = NULL;
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INIT_LIST_HEAD(&dev->tq.list);
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dev->tq.sync = 0;
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dev->tq.routine = i810_dma_task_queue;
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dev->tq.data = dev;
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@ -38,7 +38,7 @@
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#define MGA_DESC "Matrox G200/G400"
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#define MGA_DATE "20000928"
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#define MGA_MAJOR 2
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#define MGA_MINOR 0
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#define MGA_MINOR 1
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#define MGA_PATCHLEVEL 1
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static drm_device_t mga_device;
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@ -114,6 +114,7 @@ static drm_ioctl_desc_t mga_ioctls[] = {
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[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 },
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[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 },
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[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
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[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_blit, 1, 0 },
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};
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#define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
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@ -502,7 +503,7 @@ int mga_release(struct inode *inode, struct file *filp)
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if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
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&& dev->lock.pid == current->pid) {
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mga_reclaim_buffers(dev, priv->pid);
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DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02x)\n",
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DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02lx)\n",
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current->pid,
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_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
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dev->dev_private ?
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@ -6,6 +6,7 @@
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# drm.o is a fake target -- it is never built
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# The real targets are in the module-list
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O_TARGET := drm.o
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module-list := gamma.o tdfx.o r128.o radeon.o ffb.o mga.o i810.o
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export-objs := $(patsubst %.o,%_drv.o,$(module-list))
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@ -25,6 +26,11 @@ export-objs := $(patsubst %.o,%_drv.o,$(module-list))
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# memory waste (in the dual-head case) for greatly improved long-term
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# maintainability.
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#
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# NOTE: lib-objs will be eliminated in future versions, thereby
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# eliminating the need to compile the .o files into every module, but
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# for now we still need them.
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#
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lib-objs := init.o memory.o proc.o auth.o context.o drawable.o bufs.o
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lib-objs += lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o
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@ -32,65 +38,71 @@ ifeq ($(CONFIG_AGP),y)
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lib-objs += agpsupport.o
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else
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ifeq ($(CONFIG_AGP),m)
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lib-objs += agpsupport.o
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lib-objs += agpsupport.o
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endif
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endif
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gamma-objs := $(lib-objs) gamma_drv.o gamma_dma.o
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tdfx-objs := $(lib-objs) tdfx_drv.o tdfx_context.o
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r128-objs := $(lib-objs) r128_drv.o r128_cce.o r128_context.o \
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r128_bufs.o r128_state.o
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radeon-objs := $(lib-objs) radeon_drv.o radeon_cp.o radeon_context.o \
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radeon_bufs.o radeon_state.o
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ffb-objs := $(lib-objs) ffb_drv.o ffb_context.o
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mga-objs := $(lib-objs) mga_drv.o mga_dma.o mga_context.o \
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mga_bufs.o mga_state.o
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i810-objs := $(lib-objs) i810_drv.o i810_dma.o i810_context.o \
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i810_bufs.o
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gamma-objs := gamma_drv.o gamma_dma.o
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tdfx-objs := tdfx_drv.o tdfx_context.o
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r128-objs := r128_drv.o r128_cce.o r128_context.o r128_bufs.o \
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r128_state.o
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radeon-objs := radeon_drv.o radeon_cp.o radeon_context.o radeon_bufs.o \
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radeon_state.o
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ffb-objs := ffb_drv.o ffb_context.o
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mga-objs := mga_drv.o mga_dma.o mga_context.o mga_bufs.o \
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mga_state.o
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i810-objs := i810_drv.o i810_dma.o i810_context.o i810_bufs.o
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obj-$(CONFIG_DRM_GAMMA) += gamma.o $(gamma-objs)
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obj-$(CONFIG_DRM_TDFX) += tdfx.o $(tdfx-objs)
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obj-$(CONFIG_DRM_R128) += r128.o $(r128-objs)
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obj-$(CONFIG_DRM_RADEON) += radeon.o $(radeon-objs)
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obj-$(CONFIG_DRM_FFB) += ffb.o $(ffb-objs)
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obj-$(CONFIG_DRM_GAMMA) += gamma.o
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obj-$(CONFIG_DRM_TDFX) += tdfx.o
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obj-$(CONFIG_DRM_R128) += r128.o
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obj-$(CONFIG_DRM_RADEON) += radeon.o
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obj-$(CONFIG_DRM_FFB) += ffb.o
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obj-$(CONFIG_DRM_MGA) += mga.o
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obj-$(CONFIG_DRM_I810) += i810.o
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ifneq ($CONFIG_AGP),)
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obj-$(CONFIG_DRM_MGA) += mga.o $(mga-objs)
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obj-$(CONFIG_DRM_I810) += i810.o $(i810-objs)
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# When linking into the kernel, link the library just once.
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# If making modules, we include the library into each module
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lib-objs-mod := $(patsubst %.o,%-mod.o,$(lib-objs))
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ifdef MAKING_MODULES
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lib = drmlib-mod.a
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else
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obj-y += drmlib.a
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endif
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# Take module names out of obj-y and int-m
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obj-y := $(filter-out $(module-list), $(obj-y))
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int-m := $(filter-out $(module-list), $(obj-m))
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# Translate to Rules.make lists.
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O_OBJS := $(filter-out $(export-objs), $(obj-y))
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OX_OBJS := $(filter $(export-objs), $(obj-y))
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M_OBJS := $(sort $(filter $(module-list), $(obj-m)))
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MI_OBJS := $(sort $(filter-out $(export-objs), $(int-m)))
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MIX_OBJS := $(sort $(filter $(export-objs), $(int-m)))
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include $(TOPDIR)/Rules.make
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gamma.o: $(gamma-objs)
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$(LD) -r -o $@ $(gamma-objs)
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$(patsubst %.o,%.c,$(lib-objs-mod)):
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@ln -sf $(subst -mod,,$@) $@
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tdfx.o: $(tdfx-objs)
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$(LD) -r -o $@ $(tdfx-objs)
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drmlib-mod.a: $(lib-objs-mod)
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rm -f $@
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$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs-mod)
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mga.o: $(mga-objs)
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$(LD) -r -o $@ $(mga-objs)
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drmlib.a: $(lib-objs)
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rm -f $@
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$(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-objs)
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i810.o: $(i810-objs)
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$(LD) -r -o $@ $(i810-objs)
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gamma.o: $(gamma-objs) $(lib)
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$(LD) -r -o $@ $(gamma-objs) $(lib)
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r128.o: $(r128-objs)
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$(LD) -r -o $@ $(r128-objs)
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tdfx.o: $(tdfx-objs) $(lib)
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$(LD) -r -o $@ $(tdfx-objs) $(lib)
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radeon.o: $(radeon-objs)
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$(LD) -r -o $@ $(radeon-objs)
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mga.o: $(mga-objs) $(lib)
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$(LD) -r -o $@ $(mga-objs) $(lib)
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|
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ffb.o: $(ffb-objs)
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$(LD) -r -o $@ $(ffb-objs)
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i810.o: $(i810-objs) $(lib)
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$(LD) -r -o $@ $(i810-objs) $(lib)
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|
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r128.o: $(r128-objs) $(lib)
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$(LD) -r -o $@ $(r128-objs) $(lib)
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radeon.o: $(radeon-objs) $(lib)
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$(LD) -r -o $@ $(radeon-objs) $(lib)
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ffb.o: $(ffb-objs) $(lib)
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$(LD) -r -o $@ $(ffb-objs) $(lib)
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@ -60,13 +60,6 @@ GAMMAHEADERS= gamma_drv.h $(DRMHEADERS)
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TDFXOBJS= tdfx_drv.o tdfx_context.o
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TDFXHEADERS= tdfx_drv.h $(DRMHEADERS)
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R128OBJS= r128_drv.o r128_cce.o r128_bufs.o r128_context.o r128_state.o
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R128HEADERS= r128_drv.h r128_drm.h $(DRMHEADERS)
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RADEONOBJS= radeon_drv.o radeon_cp.o radeon_bufs.o radeon_context.o \
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radeon_state.o
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RADEONHEADERS= radeon_drv.h radeon_drm.h $(DRMHEADERS)
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INC= /usr/include
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CFLAGS= -O2 $(WARNINGS)
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@ -147,6 +140,13 @@ MGAHEADERS= mga_drv.h $(DRMHEADERS)
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I810OBJS= i810_drv.o i810_dma.o i810_bufs.o i810_context.o
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I810HEADERS= i810_drv.h $(DRMHEADERS)
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R128OBJS= r128_drv.o r128_cce.o r128_bufs.o r128_context.o r128_state.o
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R128HEADERS= r128_drv.h r128_drm.h $(DRMHEADERS)
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RADEONOBJS= radeon_drv.o radeon_cp.o radeon_bufs.o radeon_context.o \
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radeon_state.o
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RADEONHEADERS= radeon_drv.h radeon_drm.h $(DRMHEADERS)
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endif
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ifeq ($(SIS),1)
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@ -160,6 +160,7 @@ MODS += sis.o
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SISOBJS= sis_drv.o sis_context.o sis_ds.o sis_mm.o
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SISHEADERS= sis_drv.h sis_ds.h sis_drm.h $(DRMHEADERS)
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MODCFLAGS += -DCONFIG_DRM_SIS
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endif
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all::;@echo === KERNEL HEADERS IN $(TREE)
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@ -42,4 +42,9 @@
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#define __exit
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#endif
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||||
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||||
/* This is a hack that only works for
|
||||
this code base -- because we always
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call this with dev->tq.* */
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#define INIT_LIST_HEAD(pointer) dev->tq.next = NULL
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|
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#endif
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@ -83,7 +83,9 @@ typedef struct drm_clip_rect {
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#include "i810_drm.h"
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#include "r128_drm.h"
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#include "radeon_drm.h"
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#ifdef CONFIG_DRM_SIS
|
||||
#include "sis_drm.h"
|
||||
#endif
|
||||
|
||||
typedef struct drm_version {
|
||||
int version_major; /* Major version */
|
||||
|
|
@ -351,6 +353,7 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
|
||||
|
||||
/* I810 specific ioctls */
|
||||
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
|
||||
|
|
@ -396,6 +399,7 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
|
||||
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
|
||||
|
||||
#ifdef CONFIG_DRM_SIS
|
||||
/* SiS specific ioctls */
|
||||
#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t)
|
||||
#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t)
|
||||
|
|
@ -405,5 +409,6 @@ typedef struct drm_agp_info {
|
|||
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)
|
||||
#define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49)
|
||||
#define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -651,7 +651,7 @@ int gamma_irq_install(drm_device_t *dev, int irq)
|
|||
dev->dma->next_queue = NULL;
|
||||
dev->dma->this_buffer = NULL;
|
||||
|
||||
dev->tq.next = NULL;
|
||||
INIT_LIST_HEAD(&dev->tq.list);
|
||||
dev->tq.sync = 0;
|
||||
dev->tq.routine = gamma_dma_schedule_tq_wrapper;
|
||||
dev->tq.data = dev;
|
||||
|
|
|
|||
|
|
@ -924,7 +924,7 @@ int i810_irq_install(drm_device_t *dev, int irq)
|
|||
dev->dma->next_queue = NULL;
|
||||
dev->dma->this_buffer = NULL;
|
||||
|
||||
dev->tq.next = NULL;
|
||||
INIT_LIST_HEAD(&dev->tq.list);
|
||||
dev->tq.sync = 0;
|
||||
dev->tq.routine = i810_dma_task_queue;
|
||||
dev->tq.data = dev;
|
||||
|
|
|
|||
|
|
@ -143,7 +143,7 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
|
|||
unsigned long end;
|
||||
int i;
|
||||
|
||||
DRM_DEBUG("dispatch_status = 0x%02x\n", dev_priv->dispatch_status);
|
||||
DRM_DEBUG("dispatch_status = 0x%02lx\n", dev_priv->dispatch_status);
|
||||
end = jiffies + (HZ*3);
|
||||
while(1) {
|
||||
if(!test_and_set_bit(MGA_IN_DISPATCH,
|
||||
|
|
@ -154,7 +154,7 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
|
|||
DRM_ERROR("irqs: %d wanted %d\n",
|
||||
atomic_read(&dev->total_irq),
|
||||
atomic_read(&dma->total_lost));
|
||||
DRM_ERROR("lockup: dispatch_status = 0x%02x,"
|
||||
DRM_ERROR("lockup: dispatch_status = 0x%02lx,"
|
||||
" jiffies = %lu, end = %lu\n",
|
||||
dev_priv->dispatch_status, jiffies, end);
|
||||
return;
|
||||
|
|
@ -177,7 +177,7 @@ static inline void mga_dma_quiescent(drm_device_t *dev)
|
|||
sarea_priv->dirty |= MGA_DMA_FLUSH;
|
||||
|
||||
clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status);
|
||||
DRM_DEBUG("exit, dispatch_status = 0x%02x\n",
|
||||
DRM_DEBUG("exit, dispatch_status = 0x%02lx\n",
|
||||
dev_priv->dispatch_status);
|
||||
}
|
||||
|
||||
|
|
@ -818,7 +818,7 @@ int mga_irq_install(drm_device_t *dev, int irq)
|
|||
dev->dma->next_buffer = NULL;
|
||||
dev->dma->next_queue = NULL;
|
||||
dev->dma->this_buffer = NULL;
|
||||
dev->tq.next = NULL;
|
||||
INIT_LIST_HEAD(&dev->tq.list);
|
||||
dev->tq.sync = 0;
|
||||
dev->tq.routine = mga_dma_task_queue;
|
||||
dev->tq.data = dev;
|
||||
|
|
|
|||
|
|
@ -271,4 +271,14 @@ typedef struct _drm_mga_indices {
|
|||
int discard; /* client finished with buffer? */
|
||||
} drm_mga_indices_t;
|
||||
|
||||
typedef struct _drm_mga_blit {
|
||||
unsigned int planemask;
|
||||
unsigned int source;
|
||||
unsigned int dest;
|
||||
int delta_sx, delta_sy;
|
||||
int delta_dx, delta_dy;
|
||||
int height, ydir; /* flip image vertically */
|
||||
int source_pitch, dest_pitch;
|
||||
} drm_mga_blit_t;
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
#define MGA_DESC "Matrox G200/G400"
|
||||
#define MGA_DATE "20000928"
|
||||
#define MGA_MAJOR 2
|
||||
#define MGA_MINOR 0
|
||||
#define MGA_MINOR 1
|
||||
#define MGA_PATCHLEVEL 1
|
||||
|
||||
static drm_device_t mga_device;
|
||||
|
|
@ -114,6 +114,7 @@ static drm_ioctl_desc_t mga_ioctls[] = {
|
|||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 },
|
||||
[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)] = { mga_blit, 1, 0 },
|
||||
};
|
||||
|
||||
#define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls)
|
||||
|
|
@ -502,7 +503,7 @@ int mga_release(struct inode *inode, struct file *filp)
|
|||
if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
|
||||
&& dev->lock.pid == current->pid) {
|
||||
mga_reclaim_buffers(dev, priv->pid);
|
||||
DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02x)\n",
|
||||
DRM_INFO("Process %d dead (ctx %d, d_s = 0x%02lx)\n",
|
||||
current->pid,
|
||||
_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock),
|
||||
dev->dev_private ?
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
#define MGA_BUF_NEEDS_OVERFLOW 3
|
||||
|
||||
typedef struct {
|
||||
u32 buffer_status;
|
||||
long buffer_status; /* long req'd for set_bit() --RR */
|
||||
int num_dwords;
|
||||
int max_dwords;
|
||||
u32 *current_dma_ptr;
|
||||
|
|
@ -62,7 +62,7 @@ typedef struct _drm_mga_freelist {
|
|||
#define MGA_IN_GETBUF 3
|
||||
|
||||
typedef struct _drm_mga_private {
|
||||
u32 dispatch_status;
|
||||
long dispatch_status; /* long req'd for set_bit() --RR */
|
||||
unsigned int next_prim_age;
|
||||
__volatile__ unsigned int last_prim_age;
|
||||
int reserved_map_idx;
|
||||
|
|
@ -160,6 +160,8 @@ extern int mga_vertex(struct inode *inode, struct file *filp,
|
|||
unsigned int cmd, unsigned long arg);
|
||||
extern int mga_indices(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
extern int mga_blit(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
/* mga_context.c */
|
||||
extern int mga_resctx(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg);
|
||||
|
|
@ -339,6 +341,7 @@ drm_mga_prim_buf_t *tmp_buf = \
|
|||
#define MGAREG_SECEND 0x2c44
|
||||
#define MGAREG_SETUPADDRESS 0x2cd0
|
||||
#define MGAREG_SETUPEND 0x2cd4
|
||||
#define MGAREG_SGN 0x1c58
|
||||
#define MGAREG_SOFTRAP 0x2c48
|
||||
#define MGAREG_SRCORG 0x2cb4
|
||||
#define MGAREG_STATUS 0x1e14
|
||||
|
|
@ -497,6 +500,12 @@ drm_mga_prim_buf_t *tmp_buf = \
|
|||
#define DC_clipdis_enable 0x80000000
|
||||
|
||||
|
||||
#define SO_srcacc_pci 0x0
|
||||
#define SO_srcacc_agp 0x2
|
||||
#define SO_srcmap_fb 0x0
|
||||
#define SO_srcmap_sys 0x1
|
||||
|
||||
|
||||
#define SETADD_mode_vertlist 0x0
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -491,6 +491,8 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
|||
int length, unsigned int destOrg)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int *regs = sarea_priv->ContextState;
|
||||
int use_agp = PDEA_pagpxfer_enable | 0x00000001;
|
||||
u16 y2;
|
||||
PRIMLOCALS;
|
||||
|
|
@ -505,7 +507,7 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
|||
PRIMOUTREG(MGAREG_AR5, 64);
|
||||
|
||||
PRIMOUTREG(MGAREG_PITCH, 64);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, ~0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
|
||||
|
||||
|
|
@ -514,7 +516,7 @@ static void mga_dma_dispatch_tex_blit(drm_device_t * dev,
|
|||
PRIMOUTREG(MGAREG_FXBNDRY, (63 << 16));
|
||||
PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, y2);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
|
||||
PRIMOUTREG(MGAREG_SRCORG, 0);
|
||||
PRIMOUTREG(MGAREG_PITCH, dev_priv->stride / dev_priv->cpp);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
|
|
@ -691,7 +693,7 @@ static void mga_dma_dispatch_clear(drm_device_t * dev, int flags,
|
|||
/* Force reset of DWGCTL */
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
|
@ -722,7 +724,7 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
|
|||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, ~0);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
|
||||
|
||||
for (i = 0; i < nbox; i++) {
|
||||
|
|
@ -739,13 +741,141 @@ static void mga_dma_dispatch_swap(drm_device_t * dev)
|
|||
|
||||
/* Force reset of DWGCTL */
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
|
||||
PRIMOUTREG(MGAREG_SRCORG, 0);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
|
||||
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
/* #define BLIT_LEFT 1 */
|
||||
/* #define BLIT_UP 4 */
|
||||
|
||||
static void mga_dma_dispatch_blit(drm_device_t * dev,
|
||||
unsigned int planemask,
|
||||
unsigned int source,
|
||||
unsigned int dest,
|
||||
int delta_sx, int delta_sy,
|
||||
int delta_dx, int delta_dy,
|
||||
int source_pitch,
|
||||
int dest_pitch,
|
||||
int height,
|
||||
int ydir)
|
||||
{
|
||||
drm_mga_private_t *dev_priv = dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
unsigned int *regs = sarea_priv->ContextState;
|
||||
int nbox = sarea_priv->nbox;
|
||||
drm_clip_rect_t *pbox = sarea_priv->boxes;
|
||||
int pixel_stride = dev_priv->stride / dev_priv->cpp;
|
||||
u32 scandir = 0, i;
|
||||
|
||||
PRIMLOCALS;
|
||||
|
||||
PRIM_OVERFLOW(dev, dev_priv, (MGA_NR_SAREA_CLIPRECTS * 5) + 20);
|
||||
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7100);
|
||||
PRIMOUTREG(MGAREG_DWGSYNC, 0x7000);
|
||||
|
||||
PRIMOUTREG(MGAREG_DWGCTL, MGA_COPY_CMD);
|
||||
PRIMOUTREG(MGAREG_PLNWT, planemask);
|
||||
PRIMOUTREG(MGAREG_SRCORG, source);
|
||||
PRIMOUTREG(MGAREG_DSTORG, dest);
|
||||
|
||||
PRIMOUTREG(MGAREG_SGN, scandir);
|
||||
PRIMOUTREG(MGAREG_MACCESS, dev_priv->mAccess);
|
||||
PRIMOUTREG(MGAREG_AR5, ydir * source_pitch);
|
||||
PRIMOUTREG(MGAREG_PITCH, dest_pitch);
|
||||
|
||||
for (i = 0; i < nbox; i++) {
|
||||
int srcx = pbox[i].x1 + delta_sx;
|
||||
int srcy = pbox[i].y1 + delta_sy;
|
||||
int dstx = pbox[i].x1 + delta_dx;
|
||||
int dsty = pbox[i].y1 + delta_dy;
|
||||
int h = pbox[i].y2 - pbox[i].y1;
|
||||
int w = pbox[i].x2 - pbox[i].x1 - 1;
|
||||
int start;
|
||||
|
||||
if (ydir == -1) {
|
||||
srcy = height - srcy - 1;
|
||||
}
|
||||
|
||||
start = srcy * source_pitch + srcx;
|
||||
|
||||
PRIMOUTREG(MGAREG_AR0, start + w);
|
||||
PRIMOUTREG(MGAREG_AR3, start);
|
||||
PRIMOUTREG(MGAREG_FXBNDRY, ((dstx+w) << 16) | (dstx & 0xffff));
|
||||
PRIMOUTREG(MGAREG_YDSTLEN + MGAREG_MGA_EXEC, (dsty << 16) | h);
|
||||
}
|
||||
|
||||
/* Do something to flush AGP?
|
||||
*/
|
||||
|
||||
/* Force reset of DWGCTL */
|
||||
PRIMOUTREG(MGAREG_DMAPAD, 0);
|
||||
PRIMOUTREG(MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT]);
|
||||
PRIMOUTREG(MGAREG_PITCH, pixel_stride);
|
||||
PRIMOUTREG(MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL]);
|
||||
|
||||
PRIMADVANCE(dev_priv);
|
||||
}
|
||||
|
||||
|
||||
int mga_blit(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
drm_file_t *priv = filp->private_data;
|
||||
drm_device_t *dev = priv->dev;
|
||||
drm_mga_private_t *dev_priv =
|
||||
(drm_mga_private_t *) dev->dev_private;
|
||||
drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
|
||||
drm_mga_blit_t blit;
|
||||
|
||||
if (copy_from_user(&blit, (drm_mga_blit_t *) arg, sizeof(blit)))
|
||||
return -EFAULT;
|
||||
|
||||
DRM_DEBUG("%s\n", __FUNCTION__);
|
||||
|
||||
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) {
|
||||
DRM_ERROR("mga_blit_bufs called without lock held\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
|
||||
sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
|
||||
|
||||
/* Make sure we restore the 3D state next time.
|
||||
*/
|
||||
dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX;
|
||||
|
||||
if ((blit.source & 0x3) != (SO_srcmap_sys|SO_srcacc_pci) &&
|
||||
(blit.dest & 0x3) != (SO_srcmap_sys|SO_srcacc_pci))
|
||||
{
|
||||
mga_dma_dispatch_blit(dev,
|
||||
blit.planemask,
|
||||
blit.source,
|
||||
blit.dest,
|
||||
blit.delta_sx, blit.delta_sy,
|
||||
blit.delta_dx, blit.delta_dy,
|
||||
blit.source_pitch,
|
||||
blit.dest_pitch,
|
||||
blit.height,
|
||||
blit.ydir);
|
||||
}
|
||||
|
||||
|
||||
PRIMUPDATE(dev_priv);
|
||||
|
||||
#ifdef __i386__
|
||||
mga_flush_write_combine();
|
||||
#endif
|
||||
mga_dma_schedule(dev, 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int mga_clear_bufs(struct inode *inode, struct file *filp,
|
||||
unsigned int cmd, unsigned long arg)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -24,8 +24,8 @@
|
|||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Kevin E. Martin <martin@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -23,8 +23,8 @@
|
|||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
* Kevin E. Martin <martin@valinux.com>
|
||||
* Gareth Hughes <gareth@valinux.com>
|
||||
*
|
||||
*/
|
||||
|
||||
|
|
|
|||
|
|
@ -83,7 +83,9 @@ typedef struct drm_clip_rect {
|
|||
#include "i810_drm.h"
|
||||
#include "r128_drm.h"
|
||||
#include "radeon_drm.h"
|
||||
#ifdef CONFIG_DRM_SIS
|
||||
#include "sis_drm.h"
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#endif
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||||
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||||
typedef struct drm_version {
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||||
int version_major; /* Major version */
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||||
|
|
@ -351,6 +353,7 @@ typedef struct drm_agp_info {
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|||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
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#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
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||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
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||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
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||||
|
||||
/* I810 specific ioctls */
|
||||
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
|
||||
|
|
@ -396,6 +399,7 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
|
||||
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
|
||||
|
||||
#ifdef CONFIG_DRM_SIS
|
||||
/* SiS specific ioctls */
|
||||
#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t)
|
||||
#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t)
|
||||
|
|
@ -405,5 +409,6 @@ typedef struct drm_agp_info {
|
|||
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)
|
||||
#define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49)
|
||||
#define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -83,7 +83,9 @@ typedef struct drm_clip_rect {
|
|||
#include "i810_drm.h"
|
||||
#include "r128_drm.h"
|
||||
#include "radeon_drm.h"
|
||||
#ifdef CONFIG_DRM_SIS
|
||||
#include "sis_drm.h"
|
||||
#endif
|
||||
|
||||
typedef struct drm_version {
|
||||
int version_major; /* Major version */
|
||||
|
|
@ -351,6 +353,7 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t)
|
||||
#define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t )
|
||||
#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t)
|
||||
#define DRM_IOCTL_MGA_BLIT DRM_IOW( 0x47, drm_mga_blit_t)
|
||||
|
||||
/* I810 specific ioctls */
|
||||
#define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t)
|
||||
|
|
@ -396,6 +399,7 @@ typedef struct drm_agp_info {
|
|||
#define DRM_IOCTL_RADEON_STIPPLE DRM_IOW( 0x4c, drm_radeon_stipple_t)
|
||||
#define DRM_IOCTL_RADEON_INDIRECT DRM_IOWR(0x4d, drm_radeon_indirect_t)
|
||||
|
||||
#ifdef CONFIG_DRM_SIS
|
||||
/* SiS specific ioctls */
|
||||
#define SIS_IOCTL_FB_ALLOC DRM_IOWR(0x44, drm_sis_mem_t)
|
||||
#define SIS_IOCTL_FB_FREE DRM_IOW( 0x45, drm_sis_mem_t)
|
||||
|
|
@ -405,5 +409,6 @@ typedef struct drm_agp_info {
|
|||
#define SIS_IOCTL_FLIP DRM_IOW( 0x48, drm_sis_flip_t)
|
||||
#define SIS_IOCTL_FLIP_INIT DRM_IO( 0x49)
|
||||
#define SIS_IOCTL_FLIP_FINAL DRM_IO( 0x50)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue