nouveau/nv40: Fix channel scheduling.

Ensure NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLE gets set, otherwise channels
will appear to "freeze" in some circumstances.
This commit is contained in:
Ben Skeggs 2007-08-15 00:56:24 +10:00
parent 3ee211f4f7
commit 02c4e0e757
3 changed files with 15 additions and 1 deletions

View file

@ -455,6 +455,7 @@ extern int nv10_fifo_load_context(struct nouveau_channel *);
extern int nv10_fifo_save_context(struct nouveau_channel *);
/* nv40_fifo.c */
extern int nv40_fifo_init(struct drm_device *);
extern int nv40_fifo_create_context(struct nouveau_channel *);
extern void nv40_fifo_destroy_context(struct nouveau_channel *);
extern int nv40_fifo_load_context(struct nouveau_channel *);

View file

@ -224,7 +224,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
engine->graph.destroy_context = nv40_graph_destroy_context;
engine->graph.load_context = nv40_graph_load_context;
engine->graph.save_context = nv40_graph_save_context;
engine->fifo.init = nouveau_fifo_init;
engine->fifo.init = nv40_fifo_init;
engine->fifo.takedown = nouveau_stub_takedown;
engine->fifo.create_context = nv40_fifo_create_context;
engine->fifo.destroy_context = nv40_fifo_destroy_context;

View file

@ -193,3 +193,16 @@ nv40_fifo_save_context(struct nouveau_channel *chan)
return 0;
}
int
nv40_fifo_init(struct drm_device *dev)
{
struct drm_nouveau_private *dev_priv = dev->dev_private;
int ret;
if ((ret = nouveau_fifo_init(dev)))
return ret;
NV_WRITE(NV04_PFIFO_DMA_TIMESLICE, 0x2101ffff);
return 0;
}